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Linear-Time Reductions of Resolution Proofs

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Hardware and Software: Verification and Testing (HVC 2008)

Part of the book series: Lecture Notes in Computer Science ((LNPSE,volume 5394))

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Abstract

DPLL-based SAT solvers progress by implicitly applying binary resolution. The resolution proofs that they generate are used, after the SAT solver’s run has terminated, for various purposes. Most notable uses in formal verification are: extracting an unsatisfiable core, extracting an interpolant, and detecting clauses that can be reused in an incremental satisfiability setting (the latter uses the proof only implicitly, during the run of the SAT solver). Making the resolution proof smaller can benefit all of these goals. We suggest two methods that are linear in the size of the proof for doing so. Our first technique, called Recycle-Units, uses each learned constant (unit clause) (x) for simplifying resolution steps in which x was the pivot, prior to when it was learned. Our second technique, called Recycle-Pivots, simplifies proofs in which there are several nodes in the resolution graph, one of which dominates the others, that correspond to the same pivot. Our experiments with industrial instances show that these simplifications reduce the core by ≈ 5% and the proof by ≈ 13%. It reduces the core less than competing methods such as run-till-fix, but whereas our algorithms are linear in the size of the proof, the latter and other competing techniques are all exponential as they are based on SAT runs. If we consider the size of the proof graph as being polynomial in the number of variables (it is not necessarily the case in general), this gives our method an exponential time reduction comparing to existing tools for small core extraction. Our experiments show that this result is evident in practice more so for the second method: rarely it takes more than a few seconds, even when competing tools time out, and hence it can be used as a cheap proof post-processing procedure.

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Bar-Ilan, O., Fuhrmann, O., Hoory, S., Shacham, O., Strichman, O. (2009). Linear-Time Reductions of Resolution Proofs. In: Chockler, H., Hu, A.J. (eds) Hardware and Software: Verification and Testing. HVC 2008. Lecture Notes in Computer Science, vol 5394. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-01702-5_14

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  • DOI: https://doi.org/10.1007/978-3-642-01702-5_14

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-01701-8

  • Online ISBN: 978-3-642-01702-5

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