Abstract
A multi-level parallel partition schema and three mapping model –Service, Streaming and OpenMP model – are proposed to map video processing and retrieval (VPR) workloads to Cell processor. We present a task and data parallel partition scheme to partition and distribute intensive computation workloads of VPR to exploit the parallelism of a sequential program through the different processing core on Cell. To facilitate the VPR programming on Cell, OpenMP programming model is loaded to Cell. Some effective mapping strategies are also presented to conduct the thread creating and data handling between the different processors and reduce the overhead of system performance. The experimental results show that such parallel partition schema and mapping model can be effective to speed up VPR processing on Cell multi-core architecture.
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© 2007 IFIP International Federation for Information Processing
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Yu, J., Wei, H. (2007). Video Processing and Retrieval on Cell Processor Architecture. In: Ma, L., Rauterberg, M., Nakatsu, R. (eds) Entertainment Computing – ICEC 2007. ICEC 2007. Lecture Notes in Computer Science, vol 4740. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-74873-1_31
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DOI: https://doi.org/10.1007/978-3-540-74873-1_31
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-74872-4
Online ISBN: 978-3-540-74873-1
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