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Link to original content: https://doi.org/10.1007/978-3-540-48302-1_5
Modelling and Synthesis of Configuration Controllers for Dynamically Reconfigurable Logic Systems Using the DCS CAD Framework | SpringerLink
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Modelling and Synthesis of Configuration Controllers for Dynamically Reconfigurable Logic Systems Using the DCS CAD Framework

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Field Programmable Logic and Applications (FPL 1999)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 1673))

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Abstract

The overheads contributed to a dynamically reconfigurable logic (DRL) design by its configuration controller can be prohibitive. Not only are the resource requirements and execution delays of the dynamic design adversely effected, but the time to redesign and test a configuration controller for every design iteration can be significant. We present a generic model of a configuration controller. The model is sufficiently complex to be useful in many design scenarios, and is customisable via parameterisation and user defined blocks. A new tool, DCSConfig, has been created within the DCS CAD framework to provide partial automation of configuration controller design. The new CAD tool provides initial estimates of latency and complexity overheads. VHDL models of the configuration controller for a particular dynamic design are produced for simulation and hardware synthesis.

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References

  1. Wirthlin, M.J., Hutchings, B.: Improving Functional Density Through Run-Time Constant Propagation. In: ACM/SIGDA International Symposium on FPGAs, pp. 86–92 (1997)

    Google Scholar 

  2. Lysaght, P., McGregor, G., Stockwood, J.: Configuration Controller Synthesis for Dynamically Reconfigurable Systems. In: IEE Colloquium on Hardware - Software Cosynthesis for Reconfigurable Systems, HP Labs, Bristol, UK (February 1996)

    Google Scholar 

  3. Shirazi, N., Luk, W., Cheung, P.Y.K.: Run-Time Management of Dynamically Reconfigurable Designs. In: Hartenstein, R., Keevallik, A. (eds.) Field Programmable Logic and Applications, Tallinn, Estonia, September 1998, pp. 59–68 (1998)

    Google Scholar 

  4. Robinson, D., Lysaght, P., McGregor, G.: New CAD Framework Extends Simulation of Dynamically Reconfigurable Logic. In: Hartenstein, R., Keevallik, A. (eds.) Field Programmable Logic and Applications, Tallinn, Estonia, September 1998, pp. 1–8 (1998)

    Google Scholar 

  5. Lysaght, P.: Towards an Expert System for a priori Estimation of Reconfiguration Latency in Dynamically Reconfigurable Logic. In: Luk, W., Cheung, P., Glesner, M. (eds.) Field Programmable Logic and Applications, September 1997, pp. 183–192 (1997)

    Google Scholar 

  6. Lysaght, P., Stockwood, J.: A Simulation Tool for Dynamically Reconfigurable Field Programmable Gate Arrays. IEEE Transactions on VLSI Systems 4(3), 381–390 (1996)

    Article  Google Scholar 

  7. Brebner, G.: A virtual hardware operating system for the Xilinx XC6200. In: Hartenstein, R.W., Glesner, M. (eds.) Field-Programmable Logic and Applications, Darmstadt, September 1996, pp. 327–336 (1996)

    Google Scholar 

  8. Diessel, O., ElGindy, H.: Run-time compaction of FPGA designs. In: Luk, W., Cheung, P., Glesner, M. (eds.) Field-Programmable Logic and Applications, September 1997, pp. 131–140 (1997)

    Google Scholar 

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© 1999 Springer-Verlag Berlin Heidelberg

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Robinson, D., Lysaght, P. (1999). Modelling and Synthesis of Configuration Controllers for Dynamically Reconfigurable Logic Systems Using the DCS CAD Framework. In: Lysaght, P., Irvine, J., Hartenstein, R. (eds) Field Programmable Logic and Applications. FPL 1999. Lecture Notes in Computer Science, vol 1673. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-48302-1_5

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  • DOI: https://doi.org/10.1007/978-3-540-48302-1_5

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-66457-4

  • Online ISBN: 978-3-540-48302-1

  • eBook Packages: Springer Book Archive

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