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Link to original content: https://dblp.uni-trier.de/rec/phd/ethos/Xu95.xml
Yifan Xu 0004 New data synchronization & mapping strategies for PACE - VLSI processor architecture. 1995 University of Nottingham, UK https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.283229 British Library, EThOS