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Link to original content: https://dblp.uni-trier.de/rec/journals/tcas/XieXYLZHW16.ris
Provider: Schloss Dagstuhl - Leibniz Center for Informatics Database: dblp computer science bibliography Content:text/plain; charset="utf-8" TY - JOUR ID - DBLP:journals/tcas/XieXYLZHW16 AU - Xie, Yufeng AU - Xue, Xiaoyong AU - Yang, Jianguo AU - Lin, Yinyin AU - Zou, Qingtian AU - Huang, Ryan AU - Wu, Jingang TI - A Logic Resistive Memory Chip for Embedded Key Storage With Physical Security. JO - IEEE Trans. Circuits Syst. II Express Briefs VL - 63-II IS - 4 SP - 336 EP - 340 PY - 2016// DO - 10.1109/TCSII.2015.2503707 UR - https://doi.org/10.1109/TCSII.2015.2503707 ER -