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Link to original content: https://dblp.uni-trier.de/rec/journals/tcad/SafieddineZKER19.rdf
Maya H. Safieddine et al.: Verification at RTL Using Separation of Design Concerns. (2019) journals/tcad/SafieddineZKER19 10.1109/TCAD.2018.2848589 Verification at RTL Using Separation of Design Concerns. 5 Maya H. Safieddine 1 Fadi A. Zaraket 2 Rouwaida Kanj 3 Ali S. Elzein 4 Wolfgang Roesner 5 1529-1542 IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38 8 2019 provenance information for RDF data of dblp record 'journals/tcad/SafieddineZKER19' 2023-09-30T10:27:50+0200