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https://dblp.uni-trier.de/rec/journals/jssc/KimKKCHKK05.nt
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"Jin-Hyun Kim et al.: A 4-Gb/s/pin low-power memory I/O interface using 4-level simultaneous bi-directional signaling. (2005)" .
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_:ID_379c4c664ee632b54a44cc3a32dc78f4 . _:ID_379c4c664ee632b54a44cc3a32dc78f4
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"journals/jssc/KimKKCHKK05" .
_:ID_3f496bcfc3fcf17848c433a13beb78ae . _:ID_3f496bcfc3fcf17848c433a13beb78ae
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"10.1109/JSSC.2004.838007" .
_:ID_26672692ba321bbc01d948620cc572ad . _:ID_26672692ba321bbc01d948620cc572ad
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"Q107424888" .
"A 4-Gb/s/pin low-power memory I/O interface using 4-level simultaneous bi-directional signaling." .
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"7"^^
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_:Sig_ea29f7c834f8a471fcd2779c18eeeab0_1 . _:Sig_ea29f7c834f8a471fcd2779c18eeeab0_1
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"Jin-Hyun Kim" . _:Sig_ea29f7c834f8a471fcd2779c18eeeab0_1
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"1"^^
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_:Sig_ea29f7c834f8a471fcd2779c18eeeab0_2 . _:Sig_ea29f7c834f8a471fcd2779c18eeeab0_2
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"Sua Kim" . _:Sig_ea29f7c834f8a471fcd2779c18eeeab0_2
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"2"^^
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_:Sig_ea29f7c834f8a471fcd2779c18eeeab0_3 . _:Sig_ea29f7c834f8a471fcd2779c18eeeab0_3
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"Woo-Seop Kim" . _:Sig_ea29f7c834f8a471fcd2779c18eeeab0_3
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"3"^^
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_:Sig_ea29f7c834f8a471fcd2779c18eeeab0_4 . _:Sig_ea29f7c834f8a471fcd2779c18eeeab0_4
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"Jung-Hwan Choi" . _:Sig_ea29f7c834f8a471fcd2779c18eeeab0_4
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"4"^^
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_:Sig_ea29f7c834f8a471fcd2779c18eeeab0_5 . _:Sig_ea29f7c834f8a471fcd2779c18eeeab0_5
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"Hong-Sun Hwang" . _:Sig_ea29f7c834f8a471fcd2779c18eeeab0_5
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"5"^^
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_:Sig_ea29f7c834f8a471fcd2779c18eeeab0_6 . _:Sig_ea29f7c834f8a471fcd2779c18eeeab0_6
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"Changhyun Kim" . _:Sig_ea29f7c834f8a471fcd2779c18eeeab0_6
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"6"^^
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_:Sig_ea29f7c834f8a471fcd2779c18eeeab0_7 . _:Sig_ea29f7c834f8a471fcd2779c18eeeab0_7
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"Suki Kim" . _:Sig_ea29f7c834f8a471fcd2779c18eeeab0_7
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"7"^^
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"89-101" .
"IEEE J. Solid State Circuits" .
"IEEE J. Solid State Circuits" .
"40" .
"1" .
"2005"^^
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"provenance information for RDF data of dblp record 'journals/jssc/KimKKCHKK05'" .
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"2022-03-16T23:52:30+0100" .
