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Link to original content: https://dblp.uni-trier.de/rec/journals/csysl/AliPRAPG23.ris
Provider: Schloss Dagstuhl - Leibniz Center for Informatics Database: dblp computer science bibliography Content:text/plain; charset="utf-8" TY - JOUR ID - DBLP:journals/csysl/AliPRAPG23 AU - Ali, Zeeshan AU - Paliwal, Pallavi AU - Raj, Phani AU - Anand, Deepak AU - Pal, Debasattam AU - Gupta, Shalabh TI - Stability Analysis for Fast Settling Switched Digital Phase-Locked Loops (DPLLs). JO - IEEE Control. Syst. Lett. VL - 7 SP - 1393 EP - 1398 PY - 2023// DO - 10.1109/LCSYS.2023.3242830 UR - https://doi.org/10.1109/LCSYS.2023.3242830 ER -