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Link to original content: https://dblp.uni-trier.de/rec/conf/fpl/VenierisB17.xml
Stylianos I. Venieris Christos-Savvas Bouganis Latency-driven design for FPGA-based convolutional neural networks. 1-8 2017 FPL https://doi.org/10.23919/FPL.2017.8056828 conf/fpl/2017 db/conf/fpl/fpl2017.html#VenierisB17