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ORCIDFrancisco V. Fernández 0001
Francisco Vidal Fernández Fernández
Person information
- affiliation: University of Seville, Spain
Other persons with a similar name
- Francisco M. Fernández
![[0000-0003-0393-790X]](https://dblp.uni-trier.de/img/orcid-mark.12x12.png "0000-0003-0393-790X")
- Francisco R. Fernández
- Francisco Fernández-Navarro
- Francisco Fernandez-Aviles (aka: Francisco Fernández-Avilés)
- Kiko Fernandez-Reyes (aka: Francisco Ramón Fernández Reyes) — Uppsala University, Sweden
- Francisco Martín-Fernández
- Francisco Moya (aka: Francisco Moya Fernandez)
- Francisco F. Rivera (aka: Francisco Fernandez Rivera)
- Francisco Tirado (aka: Francisco Tirado Fernández, José Francisco Tirado Fernández)
- Francisco Fernández de Vega (aka: Francisco Fernández 0001) — University of Extremadura, Department of Computer Science, Mérida, Spain
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2020 – today
- 2024
[c92]Jose M. Gata-Romero, Elisenda Roca, Rafael Castro-López, Francisco V. Fernández:
Towards a Digital Twin of a Time-Dependent Variability Characterization Laboratory. SMACD 2024: 1-4- [c91]F. J. Rubio-Barbero, F. de Los Santos-Prieto, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández:
Harvesting RTN for True Random Number Generators and Physical Unclonable Functions. SMACD 2024: 1-4 - [c90]Andrés Santana-Andreo, Jose M. Gata-Romero, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández:
Streamlined design methodology for Cell-Based DCOs. SMACD 2024: 1-4 - 2023
- [c89]Javier Martín-Martínez, Javier Diaz-Fortuny, Pablo Saraza-Canflanca, Rosana Rodríguez, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández, Montserrat Nafría:
Challenges and solutions to the defect-centric modeling and circuit simulation of time-dependent variability. IRPS 2023: 1-9 - [c88]Eros Camacho-Ruiz, F. J. Rubio-Barbero, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández:
Design considerations for a CMOS 65-nm RTN-based PUF. SMACD 2023: 1-4 - [c87]Francisco V. Fernández, Elisenda Roca, Pablo Saraza-Canflanca, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Rafael Castro-López:
Strategies for parameter extraction of the time constant distribution of time-dependent variability models for nanometer-scale devices. SMACD 2023: 1-4 - [c86]Jose M. Gata-Romero, Elisenda Roca, Juan Núñez, Rafael Castro-López, Francisco V. Fernández:
Reliability evaluation of IC Ring Oscillator PUFs. SMACD 2023: 1-4 - [c85]Jose M. Gata-Romero, Andrés Santana-Andreo, Elisenda Roca, Rafael Castro-López, Francisco V. Fernández:
A Test Module for Aging Characterization of Digital Circuits. SMACD 2023: 1-4 - [c84]F. J. Rubio-Barbero, Eros Camacho-Ruiz, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández:
A Peak Detect & Hold circuit to measure and exploit RTN in a 65-nm CMOS PUF. SMACD 2023: 1-4 - [c83]Andrés Santana-Andreo, Pablo Saraza-Canflanca, Héctor Carrasco-Lopez, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández:
A detailed, cell-by-cell look into the effects of aging on an SRAM PUF using a specialized test array. SMACD 2023: 1-4 - 2022
- [j45]Andrés Santana-Andreo, Pablo Saraza-Canflanca, Héctor Carrasco-Lopez, Piedad Brox, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández:
A DRV-based bit selection method for SRAM PUF key generation and its impact on ECCs. Integr. 85: 1-9 (2022) - [j44]Pablo Saraza-Canflanca, Rafael Castro-López, Elisenda Roca, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Francisco V. Fernández:
On the Impact of the Biasing History on the Characterization of Random Telegraph Noise. IEEE Trans. Instrum. Meas. 71: 1-10 (2022) - [c82]Pablo Saraza-Canflanca, Héctor Carrasco-Lopez, Andrés Santana-Andreo, Javier Diaz-Fortuny, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández:
A Smart SRAM-Cell Array for the Experimental Study of Variability Phenomena in CMOS Technologies. IRPS 2022: 3-1 - [c81]Eros Camacho-Ruiz, Rafael Castro-López, Elisenda Roca, Piedad Brox, Francisco V. Fernández:
A novel Physical Unclonable Function using RTN. ISCAS 2022: 160-164 - [c80]Eros Camacho-Ruiz, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández:
High-level design of a novel PUF based on RTN. SMACD 2022: 1-4 - [c79]Eros Camacho-Ruiz, Andrés Santana-Andreo, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández:
On the use of an RTN simulator to explore the quality trade-offs of a novel RTN-based PUF. SMACD 2022: 1-4 - [c78]Fábio Passos, Nuno C. Lourenço, Ricardo Martins, Elisenda Roca, Rafael Castro-López, Nuno Horta, Francisco V. Fernández:
Machine Learning Approaches for Transformer Modeling. SMACD 2022: 1-4 - [c77]Andrés Santana-Andreo, Pablo Martín-Lloret, Elisenda Roca, Rafael Castro-López, Francisco V. Fernández:
Characterization and analysis of BTI and HCI effects in CMOS current mirrors. SMACD 2022: 1-4 - [c76]Andrés Santana-Andreo, Elisenda Roca, Rafael Castro-López, Francisco V. Fernández:
Impact of BTI and HCI on the reliability of a Majority Voter. SMACD 2022: 1-4 - [c75]Pablo Saraza-Canflanca, Javier Martín-Martínez, Elisenda Roca, Rafael Castro-López, Rosana Rodríguez, Montserrat Nafría, Francisco V. Fernández:
A systematic approach to RTN parameter fitting based on the Maximum Current Fluctuation. SMACD 2022: 1-4 - 2021
- [j43]António Canelas, Fábio Passos, Nuno Lourenço, Ricardo Martins, Elisenda Roca, Rafael Castro-López, Nuno Horta, Francisco V. Fernández:
Hierarchical Yield-Aware Synthesis Methodology Covering Device-, Circuit-, and System-Level for Radiofrequency ICs. IEEE Access 9: 124152-124164 (2021) - 2020
- [j42]Fábio Passos, Elisenda Roca, Ricardo Martins, Nuno Lourenço, Saiyd Ahyoune, Javier J. Sieiro, Rafael Castro-López, Nuno Horta, Francisco V. Fernández:
Ready-to-Fabricate RF Circuit Synthesis Using a Layout- and Variability-Aware Optimization-Based Methodology. IEEE Access 8: 51601-51609 (2020) - [j41]Pablo Saraza-Canflanca, Javier Diaz-Fortuny, Rafael Castro-López, Elisenda Roca, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Francisco V. Fernández:
A robust and automated methodology for the analysis of Time-Dependent Variability at transistor level. Integr. 72: 13-20 (2020) - [j40]Murat Pak, Francisco V. Fernández, Günhan Dündar:
Yield-aware multi-objective optimization of a MEMS accelerometer system using QMC-based methodologies. Microelectron. J. 103: 104876 (2020) - [j39]Esteban Tlelo-Cuautle, Jonathan Daniel Díaz-Muñoz, Astrid Maritza González-Zapata, Rui Li, Walter Daniel Leon-Salas, Francisco V. Fernández, Omar Guillén-Fernández, Israel Cruz-Vega:
Chaotic Image Encryption Using Hopfield and Hindmarsh-Rose Neurons Implemented on FPGA. Sensors 20(5): 1326 (2020) - [j38]Fábio Passos, Elisenda Roca, Javier J. Sieiro, Rafaella Fiorelli, Rafael Castro-López, José María López-Villegas, Francisco V. Fernández:
A Multilevel Bottom-Up Optimization Methodology for the Automated Synthesis of RF Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(3): 560-571 (2020) - [j37]Fábio Passos, Miguel Chanca, Elisenda Roca, Rafael Castro-López, Francisco V. Fernández:
Synthesis of mm-Wave Wideband Receivers in 28-nm CMOS Technology for Automotive Radar Applications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(12): 4375-4384 (2020) - [j36]Javier Diaz-Fortuny, Pablo Saraza-Canflanca, Rafael Castro-López, Elisenda Roca, Javier Martín-Martínez, Rosana Rodríguez, Francisco V. Fernández, Montserrat Nafría:
Flexible Setup for the Measurement of CMOS Time-Dependent Variability With Array-Based Integrated Circuits. IEEE Trans. Instrum. Meas. 69(3): 853-864 (2020) - [c74]Pablo Saraza-Canflanca, Héctor Carrasco-Lopez, Piedad Brox, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández:
Improving the reliability of SRAM-based PUFs in the presence of aging. DTIS 2020: 1-6
2010 – 2019
- 2019
- [j35]Victor Hugo Carbajal-Gomez, Esteban Tlelo-Cuautle, Jesús M. Muñoz-Pacheco, Luis Gerardo de la Fraga, Carlos Sánchez-López, Francisco Vidal Fernández Fernández:
Optimization and CMOS design of chaotic oscillators robust to PVT variations: INVITED. Integr. 65: 32-42 (2019) - [j34]Javier Diaz-Fortuny, Javier Martín-Martínez, Rosana Rodríguez, Rafael Castro-López, Elisenda Roca, Xavier Aragonès, Enrique Barajas, Diego Mateo, Francisco V. Fernández, Montserrat Nafría:
A Versatile CMOS Transistor Array IC for the Statistical Characterization of Time-Zero Variability, RTN, BTI, and HCI. IEEE J. Solid State Circuits 54(2): 476-488 (2019) - [j33]Fábio Passos, Reinier Gonzalez-Echevarria, Elisenda Roca, Rafael Castro-López, Francisco V. Fernández:
A two-step surrogate modeling strategy for single-objective and multi-objective optimization of radiofrequency circuits. Soft Comput. 23(13): 4911-4925 (2019) - [j32]Ricardo Martins, Nuno Lourenço, Fábio Passos, Ricardo Povoa, António Canelas, Elisenda Roca, Rafael Castro-López, Javier J. Sieiro, Francisco V. Fernández, Nuno Horta:
Two-Step RF IC Block Synthesis With Preoptimized Inductors and Full Layout Generation In-the-Loop. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(6): 989-1002 (2019) - [c73]Antonio Toro-Frías, Pablo Saraza-Canflanca, Fábio Passos, Pablo Martín-Lloret, Rafael Castro-López, Elisenda Roca, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Francisco V. Fernández:
Generation of Lifetime-Aware Pareto-Optimal Fronts Using a Stochastic Reliability Simulator. DATE 2019: 78-83 - [c72]Pablo Saraza-Canflanca, Javier Diaz-Fortuny, Rafael Castro-López, Elisenda Roca Moreno, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Francisco V. Fernández:
New method for the automated massive characterization of Bias Temperature Instability in CMOS transistors. DATE 2019: 150-155 - [c71]G. Pedreira, Javier Martín-Martínez, Javier Diaz-Fortuny, Pablo Saraza-Canflanca, Rosana Rodríguez, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández, Montserrat Nafría:
A New Time Efficient Methodology for the Massive Characterization of RTN in CMOS Devices. IRPS 2019: 1-5 - [c70]Fábio Passos, Elisenda Roca, Rafael Castro-López, Nuno Horta, Francisco V. Fernández:
Synthesis of mm-Wave circuits using-EM-simulated passive structure libraries. SMACD 2019: 57-60 - [c69]Pablo Saraza-Canflanca, Javier Diaz-Fortuny, Rafael Castro-López, Elisenda Roca, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Francisco V. Fernández:
TiDeVa: A Toolbox for the Automated and Robust Analysis of Time-Dependent Variability at Transistor Level. SMACD 2019: 197-200 - [c68]Juan Núñez, Elisenda Roca, Rafael Castro-López, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Francisco V. Fernández:
Experimental Characterization of Time-Dependent Variability in Ring Oscillators. SMACD 2019: 229-232 - [c67]Pablo Martín-Lloret, Juan Núñez, Elisenda Roca, Rafael Castro-López, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Francisco V. Fernández:
An IC Array for the Statistical Characterization of Time-Dependent Variability of Basic Circuit Blocks. SMACD 2019: 241-244 - 2018
- [j31]Murat Pak, Francisco V. Fernández, Günhan Dündar:
A novel design methodology for the mixed-domain optimization of a MEMS accelerometer. Integr. 62: 314-321 (2018) - [j30]Giulia Di Capua, Nuno Horta, Francisco V. Fernández, Günhan Dündar, Salvatore Pennisi, Gaetano Palumbo, Massimo Alioto, Gianluca Giustolisi:
Guest Editorial Special Issue on Selected Papers from PRIME 2017 and SMACD 2017. Integr. 63: 273-274 (2018) - [j29]Saiyd Ahyoune, Javier J. Sieiro, Tomás Carrasco Carrillo, Neus Vidal, José María López-Villegas, Elisenda Roca, Francisco V. Fernández:
Quasi-static PEEC planar solver using a weighted combination of 2D and 3D analytical Green's functions and a predictive meshing generator. Integr. 63: 332-341 (2018) - [j28]Fábio Passos, Ricardo Martins, Nuno Lourenço, Elisenda Roca, Ricardo Povoa, António Canelas, Rafael Castro-López, Nuno Horta, Francisco V. Fernández:
Enhanced systematic design of a voltage controlled oscillator using a two-step optimization methodology. Integr. 63: 351-361 (2018) - [j27]Fábio Passos, Elisenda Roca, Rafael Castro-López, Francisco V. Fernández:
A Comparison of Automated RF Circuit Design Methodologies: Online Versus Offline Passive Component Design. IEEE Trans. Very Large Scale Integr. Syst. 26(11): 2386-2394 (2018) - [c66]Javier Diaz-Fortuny, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández:
CMOS Characterization and Compact Modelling for Circuit Reliability Simulation. IOLTS 2018: 139-142 - [c65]Victor M. van Santen, Javier Diaz-Fortuny, Hussam Amrouch, Javier Martín-Martínez, Rosana Rodríguez, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández, Jörg Henkel, Montserrat Nafría:
Weighted time lag plot defect parameter extraction and GPU-based BTI modeling for BTI variability. IRPS 2018: 6-1 - [c64]Enrique Barajas, Xavier Aragonès, Diego Mateo, Francesc Moll, Antonio Rubio, Javier Martín-Martínez, Rosana Rodríguez, Marc Porti, Montserrat Nafría, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández:
Analysis of Body Bias and RTN-Induced Frequency Shift of Low Voltage Ring Oscillators in FDSOI Technology. PATMOS 2018: 82-87 - [c63]Fábio Passos, Ricardo Martins, Nuno C. Lourenço, Elisenda Roca, Rafael Castro-López, Ricardo Povoa, António Canelas, Nuno Horta, Francisco V. Fernández:
Handling the Effects of Variability and Layout Parasitics in the Automatic Synthesis of LNAs. SMACD 2018: 1-164 - [c62]Antonio Toro-Frías, Pablo Martín-Lloret, Javier Martín-Martínez, Rafael Castro-López, Elisenda Roca, Rosana Rodríguez, Montserrat Nafría, Francisco V. Fernández:
Lifetime Calculation Using a Stochastic Reliability Simulator for Analog ICs. SMACD 2018: 1-9 - [c61]Pablo Saraza-Canflanca, Javier Diaz-Fortuny, Antonio Toro-Frías, Rafael Castro-López, Elisenda Roca, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Francisco V. Fernández:
Automated Massive RTN Characterization Using a Transistor Array Chip. SMACD 2018: 29-32 - [c60]Javier Diaz-Fortuny, Pablo Saraza-Canflanca, Antonio Toro-Frías, Rafael Castro-López, Javier Martín-Martínez, Elisenda Roca, Rosana Rodríguez, Francisco V. Fernández, Montserrat Nafría:
A Model Parameter Extraction Methodology Including Time-Dependent Variability for Circuit Reliability Simulation. SMACD 2018: 53-56 - [c59]Pablo Saraza-Canflanca, D. Malagon, Fábio Passos, A. Toro, Juan Núñez, Javier Diaz-Fortuny, Rafael Castro-López, Elisenda Roca, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Francisco V. Fernández:
Design Considerations of an SRAM Array for the Statistical Validation of Time-Dependent Variability Models. SMACD 2018: 73-76 - 2017
- [j26]Fábio Passos, Elisenda Roca, Rafael Castro-López, Francisco V. Fernández:
Radio-frequency inductor synthesis using evolutionary computation and Gaussian-process surrogate modeling. Appl. Soft Comput. 60: 495-507 (2017) - [j25]Nuno Horta, Andrea Baschirotto, Francisco V. Fernández, Günhan Dündar, João Goes, Jorge Fernandes:
Introduction to the special issue on PRIME 2016 and SMACD 2016. Integr. 58: 411-412 (2017) - [j24]Fábio Passos, Elisenda Roca, Rafael Castro-López, Francisco V. Fernández:
An inductor modeling and optimization toolbox for RF circuit design. Integr. 58: 463-472 (2017) - [j23]Reinier Gonzalez-Echevarria, Elisenda Roca, Rafael Castro-López, Francisco V. Fernández, Javier J. Sieiro, José María López-Villegas, Neus Vidal:
An Automated Design Methodology of RF Circuits by Using Pareto-Optimal Fronts of EM-Simulated Inductors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(1): 15-26 (2017) - [c58]Fábio Passos, Elisenda Roca, Rafael Castro-López, Francisco V. Fernández:
An algorithm for a class of real-life multi-objective optimization problems with a sweeping objective. CEC 2017: 734-740 - [c57]Pablo Martín-Lloret, Antonio Toro-Frías, Javier Martín-Martínez, Rafael Castro-López, Elisenda Roca, Rosana Rodríguez, Montserrat Nafría, Francisco V. Fernández:
A size-adaptive time-step algorithm for accurate simulation of aging in analog ICs. ISCAS 2017: 1-4 - [c56]Saiyd Ahyoune, Javier J. Sieiro, Tomás Carrasco Carrillo, Neus Vidal, José María López-Villegas, Elisenda Roca, Francisco V. Fernández:
Extending the frequency range of quasi-static electromagnetic solvers. SMACD 2017: 1-4 - [c55]Javier Diaz-Fortuny, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández:
TARS: A toolbox for statistical reliability modeling of CMOS devices. SMACD 2017: 1-4 - [c54]Javier Diaz-Fortuny, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández, Enrique Barajas, Xavier Aragonès, Diego Mateo:
A transistor array chip for the statistical characterization of process variability, RTN and BTI/CHC aging. SMACD 2017: 1-4 - [c53]Nuno C. Lourenço, Ricardo Martins, Ricardo Povoa, António Canelas, Nuno Horta, Fábio Passos, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández:
New mapping strategies for pre-optimized inductor sets in bottom-up RF IC sizing optimization. SMACD 2017: 1-4 - [c52]Pablo Martín-Lloret, Antonio Toro-Frías, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría:
CASE: A reliability simulation tool for analog ICs. SMACD 2017: 1-4 - [c51]Ricardo Martins, Nuno C. Lourenço, Ricardo Povoa, António Canelas, Nuno Horta, Fábio Passos, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández:
Layout-aware challenges and a solution for the automatic synthesis of radio-frequency IC blocks. SMACD 2017: 1-4 - [c50]Murat Pak, Francisco V. Fernández, Günhan Dündar:
Optimization of a MEMS accelerometer using a multiobjective evolutionary algorithm. SMACD 2017: 1-4 - [c49]Fábio Passos, Elisenda Roca, Rafael Castro-López, Francisco V. Fernández, Ricardo Martins, Nuno C. Lourenço, Ricardo Povoa, António Canelas, Nuno C. G. Horta:
Systematic design of a voltage controlled oscillator using a layout-aware approach. SMACD 2017: 1-4 - [c48]Antonio Toro-Frías, Pablo Martín-Lloret, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría:
Including a stochastic model of aging in a reliability simulation flow. SMACD 2017: 1-4 - 2016
- [j22]Günhan Dündar, Nuno Horta, Francisco V. Fernández:
Introduction to the special issue on SMACD 2015. Integr. 55: 293-294 (2016) - [j21]Antonio Toro-Frías, Pablo Martín-Lloret, Javier Martín-Martínez, Rafael Castro-López, Elisenda Roca, Rosana Rodríguez, Montserrat Nafría, Francisco V. Fernández:
Reliability simulation for analog ICs: Goals, solutions, and challenges. Integr. 55: 341-348 (2016) - [j20]Murat Pak, Francisco V. Fernández, Günhan Dündar:
Comparison of QMC-based yield-aware pareto front techniques for multi-objective robust analog synthesis. Integr. 55: 357-365 (2016) - [c47]Fábio Passos, Reinier Gonzalez-Echevarria, Elisenda Roca, Rafael Castro-López, Francisco V. Fernández:
Accurate synthesis of integrated RF passive components using surrogate models. DATE 2016: 397-402 - [c46]Jesus Lopez-Arredondo, Esteban Tlelo-Cuautle, Francisco V. Fernández:
Optimization of LDO voltage regulators by NSGA-II. SMACD 2016: 1-4 - [c45]Fábio Passos, Elisenda Roca, Rafael Castro-López, Francisco V. Fernández:
SIDe-O: A toolbox for surrogate inductor design and optimization. SMACD 2016: 1-4 - [c44]Fábio Passos, Elisenda Roca, Rafael Castro-López, Francisco V. Fernández, Y. Ye, Domenico Spina, Tom Dhaene:
Frequency-dependent parameterized macromodeling of integrated inductors. SMACD 2016: 1-4 - [p1]Victor Hugo Carbajal-Gomez, Esteban Tlelo-Cuautle, Francisco V. Fernández:
Circuit Realization of the Synchronization of Two Chaotic Oscillators with Optimized Maximum Lyapunov Exponent. Advances in Chaos Theory and Intelligent Control 2016: 627-651 - 2015
- [j19]Ahmet Unutulmaz, Günhan Dündar, Francisco V. Fernández:
On the convex formulation of area for slicing floorplans. Integr. 50: 74-80 (2015) - [c43]Fábio Passos, Mouna Kotti, Reinier Gonzalez-Echevarria, M. Helena Fino, Mourad Fakhfakh, Elisenda Roca, Rafael Castro-López, Francisco V. Fernández:
Physical vs. surrogate models of passive RF devices. ISCAS 2015: 117-120 - [c42]Manuel Velasco-Jimenez, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández:
Design space exploration using hierarchical composition of performance models. ISCAS 2015: 1941-1944 - [c41]Gönenç Berkol, Ahmet Unutulmaz, Engin Afacan, Günhan Dündar, Francisco V. Fernández, Ali Emre Pusane, I. Faik Baskaya:
A two-step layout-in-the-loop design automation tool. NEWCAS 2015: 1-4 - 2014
- [b1]Bo Liu, Georges G. E. Gielen, Francisco V. Fernández:
Automated Design of Analog and High-frequency Circuits - A Computational Intelligence Approach. Studies in Computational Intelligence 501, Springer 2014, ISBN 978-3-642-39161-3, pp. 1-235 - [j18]Reinier Gonzalez-Echevarria, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández, Javier J. Sieiro, Neus Vidal, José María López-Villegas:
Automated Generation of the Optimal Performance Trade-Offs of Integrated Inductors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(8): 1269-1273 (2014) - [c40]Engin Afacan, Simge Ay, Francisco V. Fernández, Günhan Dündar, I. Faik Baskaya:
Model based hierarchical optimization strategies for analog design automation. DATE 2014: 1-4 - [c39]Manuel Velasco-Jimenez, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández:
Implementation issues in the hierarchical composition of performance models of analog circuits. DATE 2014: 1-6 - 2013
- [j17]Victor Hugo Carbajal-Gomez, Esteban Tlelo-Cuautle, Francisco V. Fernández:
Optimizing the positive Lyapunov exponent in multi-scroll chaotic oscillators with differential evolution algorithm. Appl. Math. Comput. 219(15): 8163-8168 (2013) - [j16]Bo Liu, Qingfu Zhang, Francisco V. Fernández, Georges G. E. Gielen:
An Efficient Evolutionary Algorithm for Chance-Constrained Bi-Objective Stochastic Optimization. IEEE Trans. Evol. Comput. 17(6): 786-796 (2013) - [c38]Ahmet Unutulmaz, Günhan Dündar, Francisco V. Fernández:
Area optimization on fixed analog floorplans using convex area functions. DATE 2013: 1843-1848 - 2012
- [c37]Bo Liu, Qingfu Zhang, Francisco V. Fernández, Georges G. E. Gielen:
Self-adaptive lower confidence bound: A new general and effective prescreening method for Gaussian Process surrogate model assisted evolutionary algorithms. IEEE Congress on Evolutionary Computation 2012: 1-6 - 2011
- [j15]Bo Liu, Francisco V. Fernández, Georges G. E. Gielen:
Efficient and Accurate Statistical Analog Yield Optimization and Variation-Aware Circuit Sizing Based on Computational Intelligence Techniques. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(6): 793-805 (2011) - [j14]Carlos Sánchez-López, Francisco V. Fernández, Esteban Tlelo-Cuautle, Sheldon X.-D. Tan:
Pathological Element-Based Active Device Models and Their Application to Symbolic Analysis. IEEE Trans. Circuits Syst. I Regul. Pap. 58-I(6): 1382-1395 (2011) - [c36]Ahmet Unutulmaz, Günhan Dündar, Francisco V. Fernández:
A template router. ECCTD 2011: 334-337 - [c35]Antonio Toro-Frías, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández:
Layout-aware Pareto fronts of electronic circuits. ECCTD 2011: 345-348 - [c34]Ahmet Unutulmaz, Günhan Dündar, Francisco V. Fernández:
LDS - A description script for layout templates. ECCTD 2011: 857-860 - 2010
- [j13]Carlos Sánchez-López, Francisco V. Fernández, Esteban Tlelo-Cuautle:
Generalized admittance matrix models of OTRAs and COAs. Microelectron. J. 41(8): 502-505 (2010) - [c33]Francisco V. Fernández, Juan Esteban-Muller, Elisenda Roca, Rafael Castro-López:
Stopping criteria in evolutionary algorithms for multi-objective performance optimization of integrated inductors. IEEE Congress on Evolutionary Computation 2010: 1-8 - [c32]Bo Liu, Francisco V. Fernández, Qingfu Zhang, Murat Pak, Suha Sipahi, Georges G. E. Gielen:
An enhanced MOEA/D-DE and its application to multiobjective analog cell sizing. IEEE Congress on Evolutionary Computation 2010: 1-7 - [c31]Bo Liu, Francisco V. Fernández, Georges G. E. Gielen:
An accurate and efficient yield optimization method for analog circuits based on computing budget allocation and memetic search technique. DATE 2010: 1106-1111
2000 – 2009
- 2009
- [j12]Rafael Castro-López, Delia Rodríguez de Llera, Mohammed Ismail, Francisco V. Fernández:
AMS/RF-CMOS circuit design for wireless transceivers. Integr. 42(1): 1-2 (2009) - [j11]Bo Liu, Yan Wang, Zhiping Yu, Leibo Liu, Miao Li, Zheng Wang, Jing Lu, Francisco V. Fernández:
Analog circuit optimization system based on hybrid evolutionary algorithms. Integr. 42(2): 137-148 (2009) - [j10]José M. de la Rosa, Rafael Castro-López, Alonso Morgado, Edwin C. Becerra-Alvarez, Rocío del Río, Francisco V. Fernández, Maria Belen Pérez-Verdú:
Adaptive CMOS analog circuits for 4G mobile terminals - Review and state-of-the-art survey. Microelectron. J. 40(1): 156-176 (2009) - [j9]Bo Liu, Francisco V. Fernández, Georges G. E. Gielen, Rafael Castro-López, Elisenda Roca:
A memetic approach to the automatic design of high-performance analog integrated circuits. ACM Trans. Design Autom. Electr. Syst. 14(3): 42:1-42:24 (2009) - [c30]Bo Liu, Francisco V. Fernández, Georges G. E. Gielen:
Fuzzy selection based differential evolution algorithm for analog cell sizing capturing imprecise human intentions. IEEE Congress on Evolutionary Computation 2009: 622-629 - [c29]Helmut Gräb, Florin Balasa, Rafael Castro-López, Yu-Wei Chang, Francisco V. Fernández, Mark Po-Hung Lin, Martin Strasser:
Analog layout synthesis - Recent advances in topological approaches. DATE 2009: 274-279 - [c28]Bo Liu, Francisco V. Fernández, Peng Gao, Georges G. E. Gielen:
A fuzzy selection based constraint handling method for multi-objective optimization of analog cells. ECCTD 2009: 611-614 - [c27]Elisenda Roca, Rafael Castro-López, Francisco V. Fernández:
Hierarchical synthesis based on pareto-optimal fronts. ECCTD 2009: 755-758 - [c26]Elisenda Roca, Mourad Fakhfakh, Rafael Castro-López, Francisco V. Fernández:
Applications of evolutionary computation techniques to analog, mixed-signal and RF circuit design - an overview. ICECS 2009: 251-254 - [c25]Bo Liu, Francisco V. Fernández, Dimitri de Jonghe, Georges G. E. Gielen:
Less expensive and high quality stopping criteria for MC-based analog IC yield optimization. ICECS 2009: 267-270 - 2008
- [j8]Alonso Morgado, V. J. Rivas, Rocío del Río, Rafael Castro-López, Francisco V. Fernández, José M. de la Rosa:
Behavioral modeling, simulation and synthesis of multi-standard wireless receivers in MATLAB/SIMULINK. Integr. 41(2): 269-280 (2008) - [j7]Francisco V. Fernández:
Editorial. Integr. 41(3): 317-318 (2008) - [j6]Ramon Tortosa Navas, José M. de la Rosa, Francisco V. Fernández, Ángel Rodríguez-Vázquez:
Clock jitter error in multi-bit continuous-time sigma-delta modulators with non-return-to-zero feedback waveform. Microelectron. J. 39(1): 137-151 (2008) - [j5]Rafael Castro-López, Oscar Guerra, Elisenda Roca, Francisco V. Fernández:
An Integrated Layout-Synthesis Approach for Analog ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(7): 1179-1189 (2008) - 2007
- [c24]Ramon Tortosa Navas, Antonio Aceituno, José M. de la Rosa, Ángel Rodríguez-Vázquez, Francisco V. Fernández:
A 12-bit@40MS/s Gm-C Cascade 3-2 Continuous-Time Sigma-Delta Modulator. ISCAS 2007: 1-4 - 2006
- [j4]Ramon Tortosa Navas, José M. de la Rosa, Francisco V. Fernández, Ángel Rodríguez-Vázquez:
A New High-Level Synthesis Methodology of Cascaded Continuous-Time Sigma Delta Modulators. IEEE Trans. Circuits Syst. II Express Briefs 53-II(8): 739-743 (2006) - [c23]Alonso Morgado, Rocío del Río, José M. de la Rosa, Fernando Medeiro, Maria Belen Pérez-Verdú, Francisco V. Fernández, Ángel Rodríguez-Vázquez:
Reconfiguration of cascade Sigma Delta modulators for multistandard GSM/Bluetooth/UMTS/WLAN transceivers. ISCAS 2006 - [c22]Ramon Tortosa Navas, José M. de la Rosa, Ángel Rodríguez-Vázquez, Francisco V. Fernández:
Design of a 1.2-V cascade continuous-time Delta Sigma modulator for broadband telecommunications. ISCAS 2006 - [c21]Ramon Tortosa Navas, Antonio Aceituno, José M. de la Rosa, Francisco V. Fernández, Ángel Rodríguez-Vázquez:
Design of a 1.2-V 130nm CMOS 13-bit@40MS/s Cascade 2-2-1 Continuous-Time Sigma-Delta Modulator. VLSI-SoC 2006: 267-271 - 2005
- [j3]Jesús Ruiz-Amaya, José M. de la Rosa, Francisco V. Fernández, Fernando Medeiro, Rocío del Río, Maria Belen Pérez-Verdú, Ángel Rodríguez-Vázquez:
High-level synthesis of switched-capacitor, switched-current and continuous-time ΣΔ modulators using SIMULINK-based time-domain behavioral models. IEEE Trans. Circuits Syst. I Regul. Pap. 52-I(9): 1795-1810 (2005) - [c20]Ramon Tortosa Navas, José M. de la Rosa, Ángel Rodríguez-Vázquez, Francisco V. Fernández:
Analysis of clock jitter error in multibit continuous-time ΣΔ modulators with NRZ feedback waveform. ISCAS (4) 2005: 3103-3106 - [c19]Ramon Tortosa Navas, José M. de la Rosa, Ángel Rodríguez-Vázquez, Francisco Vidal Fernández Fernández:
A direct synthesis method of cascaded continuous-time sigma-delta modulators. ISCAS (6) 2005: 5585-5588 - 2004
- [c18]Jesús Ruiz-Amaya, Josep Lluís de la Rosa, Fernando Medeiro, Francisco V. Fernández, Rocío del Río, Maria Belen Pérez-Verdú, Ángel Rodríguez-Vázquez:
MATLAB/SIMULINK-Based High-Level Synthesis of Discrete-Time and Continuous-Time [Sigma, Delta] Modulators. DATE 2004: 150-155 - [c17]Jesús Ruiz-Amaya, José M. de la Rosa, Fernando Medeiro, Francisco V. Fernández, Rocío del Río, Maria Belen Pérez-Verdú, Ángel Rodríguez-Vázquez:
An optimization-based tool for the high-level synthesis of discrete-time and continuous-time ΣΔ modulators in the Matlab/Simulink environment. ISCAS (5) 2004: 97-100 - 2003
- [j2]Francisco V. Fernández:
Analog and mixed-signal IC design and design methodologies. Integr. 36(4): 157-159 (2003) - [c16]Rafael Castro-López, Francisco V. Fernández, Fernando Medeiro, Ángel Rodríguez-Vázquez:
Behavioural Modelling and Simulation of SigmaDelta Modulators Using Hardware Description Languages. DATE 2003: 10168-10175 - [c15]Rafael Castro-López, José M. de la Rosa, R. Romay, Rocío del Río, Fernando Medeiro, Francisco V. Fernández:
Description Languages and Tools for the Behavioural Simulation of SD Modulators: a Comparative Survey. FDL 2003: 121-133 - [c14]Rafael Castro-López, Francisco V. Fernández, Fernando Medeiro, Ángel Rodríguez-Vázquez:
Accurate VHDL-based simulation of Sigma-Delta modulators. ISCAS (4) 2003: 632-635 - 2001
- [c13]Rafael Castro-López, Francisco V. Fernández, Manuel Delgado-Restituto, Ángel Rodríguez-Vázquez:
Retargeting of mixed-signal blocks for SoCs. DATE 2001: 772-775 - 2000
- [c12]Oscar Guerra, Elisenda Roca, Francisco V. Fernández, Ángel Rodríguez-Vázquez:
A Hierarchical Approach for the Symbolic Analysis of Large Analog Integrated Circuits. DATE 2000: 48-52 - [c11]F. M. Pérez-Montes, Fernando Medeiro, Rafael Domínguez-Castro, Francisco V. Fernández, Ángel Rodríguez-Vázquez:
XFridge: A SPICE-Based, Portable, User-Friendly Cell-Level Sizing Tool. DATE 2000: 739 - [c10]Oscar Guerra, Juan D. Rodríguez-García, Elisenda Roca, Francisco V. Fernández, Ángel Rodríguez-Vázquez:
An error-controlled methodology for approximate hierarchical symbolic analysis. ISCAS 2000: 133-136
1990 – 1999
- 1999
- [c9]Oscar Guerra, Juan D. Rodríguez-García, Elisenda Roca, Francisco V. Fernández, Ángel Rodríguez-Vázquez:
An Accurate Error Control Mechanism for Simplification Before Generation Algorihms. DATE 1999: 412- - [c8]José E. Franca, Nuno Horta, M. Pereira, João C. Vital, Rafael Castro-López, Manuel Delgado-Restituto, Francisco V. Fernández, Ángel Rodríguez-Vázquez, J. Ramos, P. Santos:
RAPID-retargetability for reusability of application-driven quadrature D/A interface block design. ICECS 1999: 1679-1683 - 1998
- [c7]Oscar Guerra, Juan D. Rodríguez-García, Elisenda Roca, Francisco V. Fernández, Ángel Rodríguez-Vázquez:
A simplification before and during generation methodology for symbolic large-circuit analysis. ICECS 1998: 81-84 - 1997
- [c6]Ignacio Garcia-Vargas, Mariano Galan, Francisco V. Fernández, Ángel Rodríguez-Vázquez:
An algorithm for numerical reference generation in symbolic analysis of large analog circuits. ED&TC 1997: 395-399 - 1995
- [j1]Piet Wambacq, Francisco V. Fernández, Georges G. E. Gielen, Willy Sansen, Ángel Rodríguez-Vázquez:
Efficient symbolic computation of approximated small-signal characteristics of analog integrated circuits. IEEE J. Solid State Circuits 30(3): 327-330 (1995) - [c5]R. Rodriguez-Macias, Francisco V. Fernández, Ángel Rodríguez-Vázquez, José L. Huertas:
A Tool for Fast Mismatch Analysis of Analog Circuits. ISCAS 1995: 2148-2151 - 1994
- [c4]Fernando Medeiro, Francisco V. Fernández, Rafael Domínguez-Castro, Ángel Rodríguez-Vázquez:
A statistical optimization-based approach for automated sizing of analog cells. ICCAD 1994: 594-597 - [c3]Francisco V. Fernández, Piet Wambacq, Georges G. E. Gielen, Ángel Rodríguez-Vázquez, Willy M. C. Sansen:
Symbolic Analysis of Large Analog Integrated Circuits by Approximation During Expression Generation. ISCAS 1994: 25-28 - [c2]Francisco V. Fernández, Georges G. E. Gielen, Lawrence Huelsman, Agnieszka Konczykowska, Stefano Manetti, Willy M. C. Sansen, Jirí Vlach:
Pleasures, Perils and Pitfalls of Symbolic Analysis. ISCAS 1994: 451-457 - 1992
- [c1]Francisco V. Fernández, Ángel Rodríguez-Vázquez, J. D. Martín, José L. Huertas:
Accuate simplification of large symbolic formulae. ICCAD 1992: 318-321
Coauthor Index
[c92] [c91] [c90] [c89] [c88] [c87] [c86] [c85] [c84] [c83] [j45] [j44] [c82] [c81] [c80] [c79] [c78] [c77] [c76] [c75] [j43] [j42] [j41] [j38] [j37] [j36] [c74] [j34] [j33] [j32] [c73] [c72] [c71] [c70] [c69] [c68] [c67] [j28] [j27] [c66] [c65] [c64] [c63] [c62] [c61] [c60] [c59] [j26] [j24] [j23] [c58] [c57] [c55] [c54] [c53] [c52] [c51] [c49] [c48] [j21] [c47] [c45] [c44] [c43] [c42] [j18] [c39] [c35] [c33] [j12] [j10] [j9] [c29] [c27] [c26] [j8] [j5] [c16] [c15] [c14] [c13] [c8]
Nuno Horta
aka: Nuno C. G. Horta
aka: Nuno C. G. Horta
Elisenda Roca
aka: Elisenda Roca Moreno
aka: Elisenda Roca Moreno
[c92] [c91] [c90] [c89] [c88] [c87] [c86] [c85] [c84] [c83] [j45] [j44] [c82] [c81] [c80] [c79] [c78] [c77] [c76] [c75] [j43] [j42] [j41] [j38] [j37] [j36] [c74] [j34] [j33] [j32] [c73] [c72] [c71] [c70] [c69] [c68] [c67] [j29] [j28] [j27] [c66] [c65] [c64] [c63] [c62] [c61] [c60] [c59] [j26] [j24] [j23] [c58] [c57] [c56] [c55] [c54] [c53] [c52] [c51] [c49] [c48] [j21] [c47] [c45] [c44] [c43] [c42] [j18] [c39] [c35] [c33] [j9] [c27] [c26] [j5] [c12] [c10] [c9] [c7]
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