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ORCIDJung Ho Ahn
Person information
- affiliation: Seoul National University, Korea
- affiliation (PhD, 2007): Stanford University, USA
Other persons with a similar name
- Jung-Ho Ahn 0001 — Seoul National University, South Korea
- Jung-Ho Ahn 0002 — Kangnam University, Yong-In, South Korea (and 1 more)
- Jung-Ho Ahn 0003 — CYRAN AI Solutions Pvt. Ltd, New Delhi, India
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2020 – today
- 2024
[j42]Donghwan Kim
, Jaiyoung Park, Jongmin Kim, Sangpyo Kim, Jung Ho Ahn:
HyPHEN: A Hybrid Packing Method and Its Optimizations for Homomorphic Encryption-Based Neural Networks. IEEE Access 12: 3024-3038 (2024)- [j41]Sungmin Yun, Hwayong Nam, Jaehyun Park, Byeongho Kim, Jung Ho Ahn, Eojin Lee:
GraNDe: Efficient Near-Data Processing Architecture for Graph Neural Networks. IEEE Trans. Computers 73(10): 2391-2404 (2024) - [c75]Jaehyun Park, Jaewan Choi, Kwanhee Kyung, Michael Jaemin Kim, Yongsuk Kwon, Nam Sung Kim, Jung Ho Ahn:
AttAcc! Unleashing the Power of PIM for Batched Transformer-based Generative Model Inference. ASPLOS (2) 2024: 103-119 - [c74]Chihun Song, Michael Jaemin Kim, Tianchen Wang, Houxiang Ji, Jinghan Huang, Ipoom Jeong, Jaehyun Park, Hwayong Nam, Minbok Wi, Jung Ho Ahn, Nam Sung Kim:
TAROT: A CXL SmartNIC-Based Defense Against Multi-bit Errors by Row-Hammer Attacks. ASPLOS (3) 2024: 981-998 - [c73]Jae Hyung Ju, Jaiyoung Park, Jongmin Kim, Minsik Kang, Donghwan Kim, Jung Hee Cheon, Jung Ho Ahn:
NeuJeans: Private Neural Network Inference with Joint Optimization of Convolution and FHE Bootstrapping. CCS 2024: 4361-4375 - [c72]Jaewan Choi, Jaehyun Park, Kwanhee Kyung, Nam Sung Kim, Jung Ho Ahn:
Unleashing the Potential of PIM: Accelerating Large Batched Inference of Transformer-Based Generative Models. HPCA 2024: 614 - [c71]Sangsoo Park, KyungSoo Kim, Jinin So, Jin Jung, Jonggeon Lee, Kyoungwan Woo, Nayeon Kim, Younghyun Lee, Hyungyo Kim, Yongsuk Kwon, Jinhyun Kim, Jieun Lee, YeonGon Cho, Yongmin Tai, Jeonghyeon Cho, Hoyoung Song, Jung Ho Ahn, Nam Sung Kim:
An LPDDR-based CXL-PNM Platform for TCO-efficient Inference of Transformer-based Large Language Models. HPCA 2024: 970-982 - [c70]Juneseo Chang, Wanju Doh, Yaebin Moon, Eojin Lee, Jung Ho Ahn:
IDT: Intelligent Data Placement for Multi-tiered Main Memory with Reinforcement Learning. HPDC 2024: 69-82 - [c69]Sungmin Yun, Hwayong Nam, Kwanhee Kyung, Jaehyun Park, Byeongho Kim, Yongsuk Kwon, Eojin Lee, Jung Ho Ahn:
CLAY: CXL-based Scalable NDP Architecture Accelerating Embedding Layers. ICS 2024: 338-351 - [c68]Hwayong Nam, Seungmin Baek, Minbok Wi, Michael Jaemin Kim, Jaehyun Park, Chihun Song, Nam Sung Kim, Jung Ho Ahn:
DRAMScope: Uncovering DRAM Microarchitecture and Characteristics by Issuing Memory Commands. ISCA 2024: 1097-1111 - [c67]Yesin Ryu, Yoojin Kim, Giyong Jung, Jung Ho Ahn, Jungrae Kim:
Native DRAM Cache: Re-architecting DRAM as a Large-Scale Cache for Data Centers. ISCA 2024: 1144-1156 - [c66]Sungmin Yun, Kwanhee Kyung, Juhwan Cho, Jaewan Choi, Jongmin Kim, Byeongho Kim, Sukhan Lee, Kyomin Sohn, Jung Ho Ahn:
Duplex: A Device for Large Language Models with Mixture of Experts, Grouped Query Attention, and Continuous Batching. MICRO 2024: 1429-1443 - [c65]Sangpyo Kim, Jongmin Kim, Jaeyoung Choi, Jung Ho Ahn:
CiFHER: A Chiplet-Based FHE Accelerator with a Resizable Structure. SEED 2024: 119-130 - [i20]Hwayong Nam, Seungmin Baek, Minbok Wi, Michael Jaemin Kim, Jaehyun Park, Chihun Song, Nam Sung Kim, Jung Ho Ahn:
DRAMScope: Uncovering DRAM Microarchitecture and Characteristics by Issuing Memory Commands. CoRR abs/2405.02499 (2024) - [i19]Jongmin Kim, Wonseok Choi, Jung Ho Ahn:
Cheddar: A Swift Fully Homomorphic Encryption Library for CUDA GPUs. CoRR abs/2407.13055 (2024) - [i18]Sungmin Yun, Kwanhee Kyung, Juhwan Cho, Jaewan Choi, Jongmin Kim, Byeongho Kim, Sukhan Lee, Kyomin Sohn, Jung Ho Ahn:
Duplex: A Device for Large Language Models with Mixture of Experts, Grouped Query Attention, and Continuous Batching. CoRR abs/2409.01141 (2024) - 2023
- [j40]Yaebin Moon, Wanju Doh, Kwanhee Kyung, Eojin Lee, Jung Ho Ahn:
ADT: Aggressive Demotion and Promotion for Tiered Memory. IEEE Comput. Archit. Lett. 22(1): 21-24 (2023) - [j39]Hwayong Nam, Seungmin Baek, Minbok Wi, Michael Jaemin Kim, Jaehyun Park, Chihun Song, Nam Sung Kim, Jung Ho Ahn:
X-ray: Discovering DRAM Internal Structure and Error Characteristics by Issuing Memory Commands. IEEE Comput. Archit. Lett. 22(2): 89-92 (2023) - [j38]Jaewan Choi, Jaehyun Park, Kwanhee Kyung, Nam Sung Kim, Jung Ho Ahn:
Unleashing the Potential of PIM: Accelerating Large Batched Inference of Transformer-Based Generative Models. IEEE Comput. Archit. Lett. 22(2): 113-116 (2023) - [j37]Hailong Li, Jaewan Choi, Yongsuk Kwon, Jung Ho Ahn:
A Hardware-Friendly Tiled Singular-Value Decomposition-Based Matrix Multiplication for Transformer-Based Models. IEEE Comput. Archit. Lett. 22(2): 169-172 (2023) - [j36]Deok-Jae Oh, Yaebin Moon, Do Kyu Ham, Tae Jun Ham, Yongjun Park, Jae W. Lee, Jung Ho Ahn, Eojin Lee:
MaPHeA: A Framework for Lightweight Memory Hierarchy-aware Profile-guided Heap Allocation. ACM Trans. Embed. Comput. Syst. 22(1): 2:1-2:28 (2023) - [c64]Minbok Wi, Jaehyun Park, Seoyoung Ko, Michael Jaemin Kim, Nam Sung Kim, Eojin Lee, Jung Ho Ahn:
SHADOW: Preventing Row Hammer in DRAM with Intra-Subarray Row Shuffling. HPCA 2023: 333-346 - [c63]Jongmin Kim, Sangpyo Kim, Jaewan Choi, Jaiyoung Park, Donghwan Kim, Jung Ho Ahn:
SHARP: A Short-Word Hierarchical Accelerator for Robust and Practical Fully Homomorphic Encryption. ISCA 2023: 18:1-18:15 - [c62]Yan Sun, Yifan Yuan, Zeduo Yu, Reese Kuper, Chihun Song, Jinghan Huang, Houxiang Ji, Siddharth Agarwal, Jiaqi Lou, Ipoom Jeong, Ren Wang, Jung Ho Ahn, Tianyin Xu, Nam Sung Kim:
Demystifying CXL Memory with Genuine CXL-Ready Systems and Devices. MICRO 2023: 105-121 - [c61]Michael Jaemin Kim, Minbok Wi, Jaehyun Park, Seoyoung Ko, Jaeyoung Choi, Hwayong Nam, Nam Sung Kim, Jung Ho Ahn, Eojin Lee:
How to Kill the Second Bird with One ECC: The Pursuit of Row Hammer Resilient DRAM. MICRO 2023: 986-1001 - [c60]Rashmi Agrawal, Jung Ho Ahn, Flávio Bergamaschi, Ro Cammarota, Jung Hee Cheon, Fillipe D. M. de Souza, Huijing Gong, Minsik Kang, Duhyeong Kim, Jongmin Kim, Hubert de Lassus, Jai Hyun Park, Michael Steiner, Wen Wang:
High-precision RNS-CKKS on fixed but smaller word-size architectures: theory and application. WAHC@CCS 2023: 23-34 - [i17]Donghwan Kim, Jaiyoung Park, Jongmin Kim, Sangpyo Kim, Jung Ho Ahn:
HyPHEN: A Hybrid Packing Method and Optimizations for Homomorphic Encryption-Based Neural Networks. CoRR abs/2302.02407 (2023) - [i16]Hwayong Nam, Seungmin Baek, Minbok Wi, Michael Jaemin Kim, Jaehyun Park, Chihun Song, Nam Sung Kim, Jung Ho Ahn:
X-ray: Discovering DRAM Internal Structure and Error Characteristics by Issuing Memory Commands. CoRR abs/2306.03366 (2023) - [i15]Dana Vantrease, Robert Schreiber, Matteo Monchiero, Moray McLaren, Norman P. Jouppi, Marco Fiorentino, Al Davis, Nathan L. Binkert, Raymond G. Beausoleil, Jung Ho Ahn:
RETROSPECTIVE: Corona: System Implications of Emerging Nanophotonic Technology. CoRR abs/2306.15688 (2023) - [i14]Dana Vantrease, Robert Schreiber, Matteo Monchiero, Moray McLaren, Norman P. Jouppi, Marco Fiorentino, Al Davis, Nathan L. Binkert, Raymond G. Beausoleil, Jung Ho Ahn:
Corona: System Implications of Emerging Nanophotonic Technology. CoRR abs/2307.06294 (2023) - [i13]Sangpyo Kim, Jongmin Kim, Jaeyoung Choi, Jung Ho Ahn:
CiFHER: A Chiplet-Based FHE Accelerator with a Resizable Structure. CoRR abs/2308.04890 (2023) - [i12]Jaiyoung Park, Donghwan Kim, Jongmin Kim, Sangpyo Kim, Wonkyung Jung, Jung Hee Cheon, Jung Ho Ahn:
Toward Practical Privacy-Preserving Convolutional Neural Networks Exploiting Fully Homomorphic Encryption. CoRR abs/2310.16530 (2023) - [i11]Jae Hyung Ju, Jaiyoung Park, Jongmin Kim, Donghwan Kim, Jung Ho Ahn:
NeuJeans: Private Neural Network Inference with Joint Optimization of Convolution and Bootstrapping. CoRR abs/2312.04356 (2023) - [i10]Rashmi Agrawal, Jung Ho Ahn, Flávio Bergamaschi, Ro Cammarota, Jung Hee Cheon, Fillipe D. M. de Souza, Huijing Gong, Minsik Kang, Duhyeong Kim, Jongmin Kim, Hubert de Lassus, Jai Hyun Park, Michael Steiner, Wen Wang:
High-precision RNS-CKKS on fixed but smaller word-size architectures: theory and application. IACR Cryptol. ePrint Arch. 2023: 1462 (2023) - 2022
- [j35]Sungmin Yun, Byeongho Kim, Jaehyun Park, Hwayong Nam, Jung Ho Ahn, Eojin Lee:
GraNDe: Near-Data Processing Architecture With Adaptive Matrix Mapping for Graph Convolutional Networks. IEEE Comput. Archit. Lett. 21(2): 45-48 (2022) - [j34]Sunjung Lee, Seunghwan Hwang, Michael Jaemin Kim, Jaewan Choi, Jung Ho Ahn:
Future Scaling of Memory Hierarchy for Tensor Cores and Eliminating Redundant Shared Memory Traffic Using Inter-Warp Multicasting. IEEE Trans. Computers 71(12): 3115-3126 (2022) - [j33]Sunjung Lee, Jaewan Choi, Wonkyung Jung, Byeongho Kim, Jaehyun Park, Hweesoo Kim, Jung Ho Ahn:
MVP: An Efficient CNN Accelerator with Matrix, Vector, and Processing-Near-Memory Units. ACM Trans. Design Autom. Electr. Syst. 27(5): 42:1-42:25 (2022) - [c59]Michael Jaemin Kim, Jaehyun Park, Yeonhong Park, Wanju Doh, Namhoon Kim, Tae Jun Ham, Jae W. Lee, Jung Ho Ahn:
Mithril: Cooperative Row Hammer Protection on Commodity DRAM Leveraging Managed Refresh. HPCA 2022: 1156-1169 - [c58]Jaewan Choi, Hailong Li, Byeongho Kim, Seunghwan Hwang, Jung Ho Ahn:
Accelerating Transformer Networks through Recomposing Softmax Layers. IISWC 2022: 92-103 - [c57]Hailong Li, Jaewan Choi, Jung Ho Ahn:
A Slice and Dice Approach to Accelerate Compound Sparse Attention on GPU. IISWC 2022: 104-116 - [c56]Sangpyo Kim, Jongmin Kim, Michael Jaemin Kim, Wonkyung Jung, John Kim, Minsoo Rhu, Jung Ho Ahn:
BTS: an accelerator for bootstrappable fully homomorphic encryption. ISCA 2022: 711-725 - [c55]Jongmin Kim, Gwangho Lee, Sangpyo Kim, Gina Sohn, Minsoo Rhu, John Kim, Jung Ho Ahn:
ARK: Fully Homomorphic Encryption Accelerator with Runtime Data Generation and Inter-Operation Key Reuse. MICRO 2022: 1237-1254 - [i9]Jaiyoung Park, Michael Jaemin Kim, Wonkyung Jung, Jung Ho Ahn:
AESPA: Accuracy Preserving Low-degree Polynomial Activation for Fast Private Inference. CoRR abs/2201.06699 (2022) - [i8]Jongmin Kim, Gwangho Lee, Sangpyo Kim, Gina Sohn, John Kim, Minsoo Rhu, Jung Ho Ahn:
ARK: Fully Homomorphic Encryption Accelerator with Runtime Data Generation and Inter-Operation Key Reuse. CoRR abs/2205.00922 (2022) - 2021
- [j32]Wonkyung Jung, Eojin Lee, Sangpyo Kim, Jongmin Kim, Namhoon Kim, Keewoo Lee, Chohong Min, Jung Hee Cheon, Jung Ho Ahn:
Accelerating Fully Homomorphic Encryption Through Architecture-Centric Analysis and Optimization. IEEE Access 9: 98772-98789 (2021) - [j31]Byeongho Kim, Jaehyun Park, Eojin Lee, Minsoo Rhu, Jung Ho Ahn:
TRiM: Tensor Reduction in Memory. IEEE Comput. Archit. Lett. 20(1): 5-8 (2021) - [j30]Hweesoo Kim, Sunjung Lee, Jaewan Choi, Jung Ho Ahn:
Row-Streaming Dataflow Using a Chaining Buffer and Systolic Array+ Structure. IEEE Comput. Archit. Lett. 20(1): 34-37 (2021) - [j29]Wonkyung Jung, Sangpyo Kim, Jung Ho Ahn, Jung Hee Cheon, Younho Lee:
Over 100x Faster Bootstrapping in Fully Homomorphic Encryption through Memory-centric Optimization with GPUs. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2021(4): 114-148 (2021) - [c54]Sungbo Park, Ingab Kang, Yaebin Moon, Jung Ho Ahn, G. Edward Suh:
BCD deduplication: effective memory compression using partial cache-line deduplication. ASPLOS 2021: 52-64 - [c53]Wonkyung Jung, Eojin Lee, Sangpyo Kim, Namhoon Kim, Keewoo Lee, Chohong Min, Jung Hee Cheon, Jung Ho Ahn:
Accelerating Fully Homomorphic Encryption Through Microarchitecture-Aware Analysis and Optimization. ISPASS 2021: 237-239 - [c52]Deok-Jae Oh, Yaebin Moon, Eojin Lee, Tae Jun Ham, Yongjun Park, Jae W. Lee, Jung Ho Ahn:
MaPHeA: a lightweight memory hierarchy-aware profile-guided heap allocation framework. LCTES 2021: 24-36 - [c51]Jaehyun Park, Byeongho Kim, Sungmin Yun, Eojin Lee, Minsoo Rhu, Jung Ho Ahn:
TRiM: Enhancing Processor-Memory Interfaces with Scalable Tensor Reduction in Memory. MICRO 2021: 268-281 - [i7]Michael Jaemin Kim, Jaehyun Park, Yeonhong Park, Wanju Doh, Namhoon Kim, Tae Jun Ham, Jae W. Lee, Jung Ho Ahn:
Mithril: Cooperative Row Hammer Protection on Commodity DRAM Leveraging Managed Refresh. CoRR abs/2108.06703 (2021) - [i6]Sangpyo Kim, Jongmin Kim, Michael Jaemin Kim, Wonkyung Jung, Minsoo Rhu, John Kim, Jung Ho Ahn:
BTS: An Accelerator for Bootstrappable Fully Homomorphic Encryption. CoRR abs/2112.15479 (2021) - [i5]Wonkyung Jung, Sangpyo Kim, Jung Ho Ahn, Jung Hee Cheon, Younho Lee:
Over 100x Faster Bootstrapping in Fully Homomorphic Encryption through Memory-centric Optimization with GPUs. IACR Cryptol. ePrint Arch. 2021: 508 (2021) - 2020
- [j28]Ingab Kang, Eojin Lee, Jung Ho Ahn:
CAT-TWO: Counter-Based Adaptive Tree, Time Window Optimized for DRAM Row-Hammer Prevention. IEEE Access 8: 17366-17377 (2020) - [j27]Byeongho Kim, Jongwook Chung, Eojin Lee, Wonkyung Jung, Sunjung Lee, Jaewan Choi, Jaehyun Park, Minbok Wi, Sukhan Lee, Jung Ho Ahn:
MViD: Sparse Matrix-Vector Multiplication in Mobile DRAM for Accelerating Recurrent Neural Networks. IEEE Trans. Computers 69(7): 955-967 (2020) - [c50]Sangpyo Kim, Wonkyung Jung, Jaiyoung Park, Jung Ho Ahn:
Accelerating Number Theoretic Transformations for Bootstrappable Homomorphic Encryption on GPUs. IISWC 2020: 264-275 - [c49]Yeonhong Park, Woosuk Kwon, Eojin Lee, Tae Jun Ham, Jung Ho Ahn, Jae W. Lee:
Graphene: Strong yet Lightweight Row Hammer Protection. MICRO 2020: 1-13 - [i4]Wonkyung Jung, Eojin Lee, Sangpyo Kim, Keewoo Lee, Namhoon Kim, Chohong Min, Jung Hee Cheon, Jung Ho Ahn:
HEAAN Demystified: Accelerating Fully Homomorphic Encryption Through Architecture-centric Analysis and Optimization. CoRR abs/2003.04510 (2020) - [i3]Sangpyo Kim, Wonkyung Jung, Jaiyoung Park, Jung Ho Ahn:
Accelerating Number Theoretic Transformations for Bootstrappable Homomorphic Encryption on GPUs. CoRR abs/2012.01968 (2020)
2010 – 2019
- 2019
- [c48]Jongwook Chung, Yuhwan Ro, Joonsung Kim, Jaehyung Ahn, Jangwoo Kim, John Kim, Jae W. Lee, Jung Ho Ahn:
Enforcing Last-Level Cache Partitioning through Memory Virtual Channels. PACT 2019: 97-109 - [c47]Eojin Lee, Ingab Kang, Sukhan Lee, G. Edward Suh, Jung Ho Ahn:
TWiCe: preventing row-hammering by exploiting time window counters. ISCA 2019: 385-396 - [c46]Wonkyung Jung, Daejin Jung, Byeongho Kim, Sunjung Lee, Wonjong Rhee, Jung Ho Ahn:
Restructuring Batch Normalization to Accelerate CNN Training. SysML 2019 - 2018
- [j26]Sukhan Lee, Hyunyoon Cho, Young Hoon Son, Yuhwan Ro, Nam Sung Kim, Jung Ho Ahn:
Leveraging Power-Performance Relationship of Energy-Efficient Modern DRAM Devices. IEEE Access 6: 31387-31398 (2018) - [j25]Daejin Jung, Sunjung Lee, Wonjong Rhee, Jung Ho Ahn:
Partitioning Compute Units in CNN Acceleration for Statistical Memory Traffic Shaping. IEEE Comput. Archit. Lett. 17(1): 72-75 (2018) - [j24]Eojin Lee, Sukhan Lee, G. Edward Suh, Jung Ho Ahn:
TWiCe: Time Window Counter Based Row Refresh to Prevent Row-Hammering. IEEE Comput. Archit. Lett. 17(1): 96-99 (2018) - [c45]Sukhan Lee, Kiwon Lee, Min Chul Sung, Mohammad Alian, Chankyung Kim, Wooyeong Cho, Reum Oh, Seongil O, Jung Ho Ahn, Nam Sung Kim:
3D-Xpath: high-density managed DRAM architecture with cost-effective alternative paths for memory transactions. PACT 2018: 22:1-22:12 - [c44]Grant Ayers, Jung Ho Ahn, Christos Kozyrakis, Parthasarathy Ranganathan:
Memory Hierarchy for Web Search. HPCA 2018: 643-656 - [i2]Daejin Jung, Sunjung Lee, Wonjong Rhee, Jung Ho Ahn:
Partitioning Compute Units in CNN Acceleration for Statistical Memory Traffic Shaping. CoRR abs/1806.06541 (2018) - [i1]Daejin Jung, Wonkyung Jung, Byeongho Kim, Sunjung Lee, Wonjong Rhee, Jung Ho Ahn:
Restructuring Batch Normalization to Accelerate CNN Training. CoRR abs/1807.01702 (2018) - 2017
- [j23]WonJun Song, Hyungjoon Jung, Jung Ho Ahn, Jae W. Lee, John Kim:
Evaluation of Performance Unfairness in NUMA System Architecture. IEEE Comput. Archit. Lett. 16(1): 26-29 (2017) - [j22]Young Hoon Son, Hyunyoon Cho, Yuhwan Ro, Jae W. Lee, Jung Ho Ahn:
SALAD: Achieving Symmetric Access Latency with Asymmetric DRAM Architecture. IEEE Comput. Archit. Lett. 16(1): 76-79 (2017) - [j21]Yuhwan Ro, Min Chul Sung, Yongjun Park, Jung Ho Ahn:
Selective DRAM cache bypassing for improving bandwidth on DRAM/NVM hybrid main memory systems. IEICE Electron. Express 14(11): 20170437 (2017) - [j20]Jinho Lee, Jongwook Chung, Jung Ho Ahn, Kiyoung Choi:
Excavating the Hidden Parallelism Inside DRAM Architectures With Buffered Compares. IEEE Trans. Very Large Scale Integr. Syst. 25(6): 1793-1806 (2017) - [c43]WonJun Song, Gwangsun Kim, Hyungjoon Jung, Jongwook Chung, Jung Ho Ahn, Jae W. Lee, John Kim:
History-Based Arbitration for Fairness in Processor-Interconnect of NUMA Servers. ASPLOS 2017: 765-777 - [c42]Sang-uhn Cha, Seongil O, Hyunsung Shin, Sangjoon Hwang, Kwang-Il Park, Seong-Jin Jang, Joo-Sun Choi, Gyo-Young Jin, Young Hoon Son, Hyunyoon Cho, Jung Ho Ahn, Nam Sung Kim:
Defect Analysis and Cost-Effective Resilience Architecture for Future DRAM Devices. HPCA 2017: 61-72 - [c41]Yuhwan Ro, Hyunyoon Cho, Eojin Lee, Daejin Jung, Young Hoon Son, Jung Ho Ahn, Jae W. Lee:
SOUP-N-SALAD: Allocation-Oblivious Access Latency Reduction with Asymmetric DRAM Microarchitectures. HPCA 2017: 517-528 - [c40]Sukhan Lee, Yuhwan Ro, Young Hoon Son, Hyunyoon Cho, Nam Sung Kim, Jung Ho Ahn:
Understanding power-performance relationship of energy-efficient modern DRAM devices. IISWC 2017: 110-111 - [c39]Eojin Lee, Jongwook Chung, Daejin Jung, Sukhan Lee, Sheng Li, Jung Ho Ahn:
Work as a team or individual: Characterizing the system-level impacts of main memory partitioning. IISWC 2017: 156-166 - 2016
- [j19]Daejin Jung, Sheng Li, Jung Ho Ahn:
Large Pages on Steroids: Small Ideas to Accelerate Big Memory Applications. IEEE Comput. Archit. Lett. 15(2): 101-104 (2016) - [j18]Bingchao Li, Choungki Song, Jizeng Wei, Jung Ho Ahn, Nam Sung Kim:
Exploring new features of high-bandwidth memory for GPUs. IEICE Electron. Express 13(14): 20160527 (2016) - [j17]Hadi Asghari Moghaddam, Amin Farmahini Farahani, Katherine Morrow, Jung Ho Ahn, Nam Sung Kim:
Near-DRAM Acceleration with Single-ISA Heterogeneous Processing in Standard Memory Modules. IEEE Micro 36(1): 24-34 (2016) - [j16]Sheng Li, Hyeontaek Lim, Victor W. Lee, Jung Ho Ahn, Anuj Kalia, Michael Kaminsky, David G. Andersen, Seongil O, Sukhan Lee, Pradeep Dubey:
Achieving One Billion Key-Value Requests per Second on a Single Server. IEEE Micro 36(3): 94-104 (2016) - [j15]Sheng Li, Hyeontaek Lim, Victor W. Lee, Jung Ho Ahn, Anuj Kalia, Michael Kaminsky, David G. Andersen, Seongil O, Sukhan Lee, Pradeep Dubey:
Full-Stack Architecting to Achieve a Billion-Requests-Per-Second Throughput on a Single Key-Value Store Server Platform. ACM Trans. Comput. Syst. 34(2): 5:1-5:30 (2016) - [c38]Byungchul Hong, Gwangsun Kim, Jung Ho Ahn, Yongkee Kwon, Hongsik Kim, John Kim:
Accelerating Linked-list Traversal Through Near-Data Processing. PACT 2016: 113-124 - [c37]Jinho Lee, Jung Ho Ahn, Kiyoung Choi:
Buffered compares: Excavating the hidden parallelism inside DRAM architectures with lightweight logic. DATE 2016: 1243-1248 - [c36]Byungchul Hong, Yongkee Kwon, Jung Ho Ahn, John Kim:
Adaptive and flexible key-value stores through soft data partitioning. ICCD 2016: 296-303 - [c35]Hadi Asghari Moghaddam, Young Hoon Son, Jung Ho Ahn, Nam Sung Kim:
Chameleon: Versatile and practical near-DRAM acceleration architecture for large memory systems. MICRO 2016: 50:1-50:13 - 2015
- [j14]Seongil O, Sanghyuk Kwon, Young Hoon Son, Yujin Park, Jung Ho Ahn:
CIDR: A Cache Inspired Area-Efficient DRAM Resilience Architecture against Permanent Faults. IEEE Comput. Archit. Lett. 14(1): 17-20 (2015) - [j13]Amin Farmahini Farahani, Jung Ho Ahn, Katherine Morrow, Nam Sung Kim:
DRAMA: An Architecture for Accelerated Processing Near Memory. IEEE Comput. Archit. Lett. 14(1): 26-29 (2015) - [c34]Amin Farmahini Farahani, Jung Ho Ahn, Katherine Morrow, Nam Sung Kim:
NDA: Near-DRAM acceleration architecture leveraging commodity DRAM devices and standard memory modules. HPCA 2015: 283-295 - [c33]Hao Wang, Chang-Jae Park, Gyungsu Byun, Jung Ho Ahn, Nam Sung Kim:
Alloy: Parallel-serial memory channel architecture for single-chip heterogeneous processor systems. HPCA 2015: 296-308 - [c32]Young Hoon Son, Sukhan Lee, Seongil O, Sanghyuk Kwon, Nam Sung Kim, Jung Ho Ahn:
CiDRA: A cache-inspired DRAM resilience architecture. HPCA 2015: 502-513 - [c31]Ke Chen, Sheng Li, Jung Ho Ahn, Naveen Muralimanohar, Jishen Zhao, Cong Xu, Seongil O, Yuan Xie, Jay B. Brockman, Norman P. Jouppi:
History-Assisted Adaptive-Granularity Caches (HAAG$) for High Performance 3D DRAM Architectures. ICS 2015: 251-261 - [c30]Sheng Li, Hyeontaek Lim, Victor W. Lee, Jung Ho Ahn, Anuj Kalia, Michael Kaminsky, David G. Andersen, Seongil O, Sukhan Lee, Pradeep Dubey:
Architecting to achieve a billion requests per second throughput on a single key-value store server platform. ISCA 2015: 476-488 - 2014
- [c29]Seongil O, Young Hoon Son, Nam Sung Kim, Jung Ho Ahn:
Row-buffer decoupling: A case for low-latency DRAM microarchitecture. ISCA 2014: 337-348 - [c28]Young Hoon Son, Seongil O, Hyunggyun Yang, Daejin Jung, Jung Ho Ahn, John Kim, Jangwoo Kim, Jae W. Lee:
Microbank: Architecting Through-Silicon Interposer-Based Main Memory Systems. SC 2014: 1059-1070 - 2013
- [j12]Sheng Li, Jung Ho Ahn, Richard D. Strong, Jay B. Brockman, Dean M. Tullsen, Norman P. Jouppi:
The McPAT Framework for Multicore and Manycore Architectures: Simultaneously Modeling Power, Area, and Timing. ACM Trans. Archit. Code Optim. 10(1): 5:1-5:29 (2013) - [j11]Jung Ho Ahn, Young Hoon Son, John Kim:
Scalable high-radix router microarchitecture using a network switch organization. ACM Trans. Archit. Code Optim. 10(3): 17:1-17:25 (2013) - [j10]Jinho Lee, Moo-Kyoung Chung, Yeon-Gon Cho, Soojung Ryu, Jung Ho Ahn, Kiyoung Choi:
Mapping and Scheduling of Tasks and Communications on Many-Core SoC Under Local Memory Constraint. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(11): 1748-1761 (2013) - [j9]Young-Geun Choi, Sungjoo Yoo, Sunggu Lee, Jung Ho Ahn, Kangmin Lee:
MAEPER: Matching Access and Error Patterns With Error-Free Resource for Low Vcc L1 Cache. IEEE Trans. Very Large Scale Integr. Syst. 21(6): 1013-1026 (2013) - [j8]Hyunhee Kim, Jung Ho Ahn, Jihong Kim:
Exploiting Replicated Cache Blocks to Reduce L2 Cache Leakage in CMPs. IEEE Trans. Very Large Scale Integr. Syst. 21(10): 1863-1877 (2013) - [c27]Gwangsun Kim, John Kim, Jung Ho Ahn, Jaeha Kim:
Memory-centric system interconnect design with Hybrid Memory Cubes. PACT 2013: 145-155 - [c26]Daniel W. Chang, Young Hoon Son, Jung Ho Ahn, Hoyoung Kim, Minwook Ahn, Michael J. Schulte, Nam Sung Kim:
Dynamic bandwidth scaling for embedded DSPs with 3D-stacked DRAM and wide I/Os. ICCAD 2013: 747-754 - [c25]Young Hoon Son, Seongil O, Yuhwan Ro, Jae W. Lee, Jung Ho Ahn:
Reducing memory access latency with asymmetric DRAM bank organizations. ISCA 2013: 380-391 - [c24]Jung Ho Ahn, Sheng Li, Seongil O, Norman P. Jouppi:
McSimA+: A manycore simulator with application-level+ simulation and detailed microarchitecture modeling. ISPASS 2013: 74-85 - 2012
- [j7]Nathan L. Binkert, Al Davis, Norman P. Jouppi, Moray McLaren, Naveen Muralimanohar, Robert Schreiber, Jung Ho Ahn:
Optical High Radix Switch Design. IEEE Micro 32(3): 100-109 (2012) - [j6]Jung Ho Ahn, Norman P. Jouppi, Christos Kozyrakis, Jacob Leverich, Robert S. Schreiber:
Improving System Energy Efficiency with Memory Rank Subsetting. ACM Trans. Archit. Code Optim. 9(1): 4:1-4:28 (2012) - [c23]Ke Chen, Sheng Li, Naveen Muralimanohar, Jung Ho Ahn, Jay B. Brockman, Norman P. Jouppi:
CACTI-3DD: Architecture-level modeling for 3D die-stacked DRAM main memory. DATE 2012: 33-38 - [c22]Jung Ho Ahn, Sungwoo Choo, John Kim:
Network within a network approach to create a scalable high-radix router microarchitecture. HPCA 2012: 455-466 - [c21]Sheng Li, Doe Hyun Yoon, Ke Chen, Jishen Zhao, Jung Ho Ahn, Jay B. Brockman, Yuan Xie, Norman P. Jouppi:
MAGE: adaptive granularity and ECC for resilient and power efficient memory systems. SC 2012: 33 - 2011
- [c20]Young-Geun Choi, Sungjoo Yoo, Sunggu Lee, Jung Ho Ahn:
Matching cache access behavior and bit error pattern for high performance low Vcc L1 cache. DAC 2011: 978-983 - [c19]Dongki Kim, Sungjoo Yoo, Sunggu Lee, Jung Ho Ahn, Hyunuk Jung:
A quantitative analysis of performance benefits of 3D die stacking on mobile and embedded SoC. DATE 2011: 1333-1338 - [c18]Sheng Li, Ke Chen, Jung Ho Ahn, Jay B. Brockman, Norman P. Jouppi:
CACTI-P: Architecture-level modeling for SRAM-based structures with advanced leakage reduction techniques. ICCAD 2011: 694-701 - [c17]Nathan L. Binkert, Al Davis, Norman P. Jouppi, Moray McLaren, Naveen Muralimanohar, Robert Schreiber, Jung Ho Ahn:
The role of optics in future high radix switch design. ISCA 2011: 437-448 - [c16]Jinho Lee, Mingyang Zhu, Kiyoung Choi, Jung Ho Ahn, Rohit Sharma:
3D network-on-chip with wireless links through inductive coupling. ISOCC 2011: 353-356 - [p1]Jung Ho Ahn, Raymond G. Beausoleil, Nathan L. Binkert, Al Davis, Marco Fiorentino, Norman P. Jouppi, Moray McLaren, Matteo Monchiero, Naveen Muralimanohar, Robert Schreiber, Dana Vantrease:
CMOS Nanophotonics: Technology, System Implications, and a CMP Case Study. Low Power Networks-on-Chip 2011: 223-254 - 2010
- [c15]Hyunhee Kim, Jung Ho Ahn, Jihong Kim:
Replication-aware leakage management in chip multiprocessors with private L2 cache. ISLPED 2010: 135-140
2000 – 2009
- 2009
- [j5]Jung Ho Ahn, Jacob Leverich, Robert S. Schreiber, Norman P. Jouppi:
Multicore DIMM: an Energy Efficient Memory Module with Independently Controlled DRAMs. IEEE Comput. Archit. Lett. 8(1): 5-8 (2009) - [j4]Matteo Monchiero, Jung Ho Ahn, Ayose Falcón, Daniel Ortega, Paolo Faraboschi:
How to simulate 1000 cores. SIGARCH Comput. Archit. News 37(2): 10-19 (2009) - [c14]Sheng Li, Jung Ho Ahn, Richard D. Strong, Jay B. Brockman, Dean M. Tullsen, Norman P. Jouppi:
McPAT: an integrated power, area, and timing modeling framework for multicore and manycore architectures. MICRO 2009: 469-480 - [c13]Jung Ho Ahn, Nathan L. Binkert, Al Davis, Moray McLaren, Robert S. Schreiber:
HyperX: topology, routing, and packaging of efficient large-scale networks. SC 2009 - [c12]Jung Ho Ahn, Norman P. Jouppi, Christos Kozyrakis, Jacob Leverich, Robert S. Schreiber:
Future scaling of processor-memory interfaces. SC 2009 - 2008
- [c11]Raymond G. Beausoleil, Jung Ho Ahn, Nathan L. Binkert, Al Davis, David Fattal, Marco Fiorentino, Norman P. Jouppi, Moray McLaren, Charles M. Santori, Robert S. Schreiber, S. M. Spillane, Dana Vantrease, Qianfan Xu:
A Nanophotonic Interconnect for High-Performance Many-Core Computation. Hot Interconnects 2008: 182-189 - [c10]Shyamkumar Thoziyoor, Jung Ho Ahn, Matteo Monchiero, Jay B. Brockman, Norman P. Jouppi:
A Comprehensive Memory Modeling Tool and Its Application to the Design and Analysis of Future Memory Hierarchies. ISCA 2008: 51-62 - [c9]Dana Vantrease, Robert Schreiber, Matteo Monchiero, Moray McLaren, Norman P. Jouppi, Marco Fiorentino, Al Davis, Nathan L. Binkert, Raymond G. Beausoleil, Jung Ho Ahn:
Corona: System Implications of Emerging Nanophotonic Technology. ISCA 2008: 153-164 - 2007
- [c8]Mattan Erez, Jung Ho Ahn, Jayanth Gummaraju, Mendel Rosenblum, William J. Dally:
Executing irregular scientific applications on stream architectures. ICS 2007: 93-104 - [c7]Jung Ho Ahn, Mattan Erez, William J. Dally:
Tradeoff between data-, instruction-, and thread-level parallelism in stream processors. ICS 2007: 126-137 - 2006
- [j3]Jung Ho Ahn, William J. Dally:
Data parallel address architecture. IEEE Comput. Archit. Lett. 5(1): 30-33 (2006) - [c6]Jung Ho Ahn, Mattan Erez, William J. Dally:
Architecture - The design space of data-parallel memory systems. SC 2006: 80 - 2005
- [c5]Jung Ho Ahn, Mattan Erez, William J. Dally:
Scatter-Add in Data Parallel Architectures. HPCA 2005: 132-142 - 2004
- [j2]William J. Dally, Ujval J. Kapasi, Brucek Khailany, Jung Ho Ahn, Abhishek Das:
Stream Processors: Progammability and Efficiency. ACM Queue 2(1): 52-62 (2004) - [c4]Nuwan Jayasena, Mattan Erez, Jung Ho Ahn, William J. Dally:
Stream Register Files with Indexed Access. HPCA 2004: 60-72 - [c3]Jung Ho Ahn, William J. Dally, Brucek Khailany, Ujval J. Kapasi, Abhishek Das:
Evaluating the Imagine Stream Architecture. ISCA 2004: 14-25 - [c2]Mattan Erez, Jung Ho Ahn, Ankit Garg, William J. Dally, Eric Darve:
Analysis and Performance Results of a Molecular Modeling Application on Merrimac. SC 2004: 42 - 2003
- [j1]Ujval J. Kapasi, Scott Rixner, William J. Dally, Brucek Khailany, Jung Ho Ahn, Peter R. Mattson, John D. Owens:
Programmable Stream Processors. Computer 36(8): 54-62 (2003) - [c1]William J. Dally, Francois Labonte, Abhishek Das, Pat Hanrahan, Jung Ho Ahn, Jayanth Gummaraju, Mattan Erez, Nuwan Jayasena, Ian Buck, Timothy J. Knight, Ujval J. Kapasi:
Merrimac: Supercomputing with Streams. SC 2003: 35
Coauthor Index
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