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Link to original content: https://dblp.uni-trier.de/pid/86/1277.rss
dblp: He-Yuan Lin https://dblp.org/pid/86/1277.html dblp person page RSS feed Wed, 24 Apr 2024 23:20:01 +0200 en-US daily 1 released under the CC0 1.0 license dblp@dagstuhl.de (dblp team) dblp@dagstuhl.de (dblp team) Computers/Computer_Science/Publications/Bibliographies http://www.rssboard.org/rss-specification https://dblp.org/img/logo.144x51.pngdblp: He-Yuan Linhttps://dblp.org/pid/86/1277.html14451 3-D Video Generation from Monocular Video Based on Hierarchical Video Segmentation.https://doi.org/10.1007/s11265-014-0955-3, , , :
3-D Video Generation from Monocular Video Based on Hierarchical Video Segmentation. J. Signal Process. Syst. 81(3): 345-358 ()]]>https://dblp.org/rec/journals/vlsisp/LeeCLW15Thu, 01 Jan 2015 00:00:00 +0100 Algorithmic complexity analysis on data transfer rate and data storage for multidimensional signal processing.https://doi.org/10.1109/SiPS.2013.6674500, , :
Algorithmic complexity analysis on data transfer rate and data storage for multidimensional signal processing. SiPS : 171-176]]>https://dblp.org/rec/conf/sips/LeeCL13Tue, 01 Jan 2013 00:00:00 +0100 Quantifying Intrinsic Parallelism Using Linear Algebra for Algorithm/Architecture Coexploration.https://doi.org/10.1109/TPDS.2011.230, , , :
Quantifying Intrinsic Parallelism Using Linear Algebra for Algorithm/Architecture Coexploration. IEEE Trans. Parallel Distributed Syst. 23(5): 944-957 ()]]>https://dblp.org/rec/journals/tpds/LeeLCH12Sun, 01 Jan 2012 00:00:00 +0100 A high throughput parallel AVC/H.264 context-based adaptive binary arithmetic decoder.https://doi.org/10.1109/ICASSP.2011.5946835, , :
A high throughput parallel AVC/H.264 context-based adaptive binary arithmetic decoder. ICASSP : 1729-1732]]>https://dblp.org/rec/conf/icassp/LiangLL11Sat, 01 Jan 2011 00:00:00 +0100 Reconfigurable inverse transform architecture for multiple purpose video coding.https://doi.org/10.1109/ISCAS.2011.5937790, , , :
Reconfigurable inverse transform architecture for multiple purpose video coding. ISCAS : 1223-1226]]>https://dblp.org/rec/conf/iscas/HuangLCL11Sat, 01 Jan 2011 00:00:00 +0100 Reconfigurable architecture design of motion compensation for multi-standard video coding.https://doi.org/10.1109/ISCAS.2010.5537127, , , :
Reconfigurable architecture design of motion compensation for multi-standard video coding. ISCAS : 2003-2006]]>https://dblp.org/rec/conf/iscas/LeeYWL10Fri, 01 Jan 2010 00:00:00 +0100 Rate control algorithm based on intra-picture complexity for H.264/AVC.https://doi.org/10.1049/iet-ipr:20080088, , :
Rate control algorithm based on intra-picture complexity for H.264/AVC. IET Image Process. 3(1): 26-39 ()]]>https://dblp.org/rec/journals/iet-ipr/LeeLW09Thu, 01 Jan 2009 00:00:00 +0100 An RVC dataflow description of the AVC Constrained Baseline Profile decoder.https://doi.org/10.1109/ICIP.2009.5414265, , , , , , :
An RVC dataflow description of the AVC Constrained Baseline Profile decoder. ICIP : 753-756]]>https://dblp.org/rec/conf/icip/GorinRCLSSL09Thu, 01 Jan 2009 00:00:00 +0100 A Motion-compensated Spectrum-adaptive Deinterlacing Algorithm.https://doi.org/10.1109/ISCAS.2009.5117859, , , :
A Motion-compensated Spectrum-adaptive Deinterlacing Algorithm. ISCAS : 758-761]]>https://dblp.org/rec/conf/iscas/LeeWLH09Thu, 01 Jan 2009 00:00:00 +0100 Low Complexity and High Throughput VLSI Architecture for AVC/H.264 CAVLC Decoding.https://doi.org/10.1109/ISCAS.2009.5117984, , , , , :
Low Complexity and High Throughput VLSI Architecture for AVC/H.264 CAVLC Decoding. ISCAS : 1229-1232]]>https://dblp.org/rec/conf/iscas/LeeLCLLW09Thu, 01 Jan 2009 00:00:00 +0100 Algorithm and Architecture Design for Wide Range ELA Deinterlacer.https://doi.org/10.1109/ISCAS.2009.5118275, , , , , , :
Algorithm and Architecture Design for Wide Range ELA Deinterlacer. ISCAS : 2365-2368]]>https://dblp.org/rec/conf/iscas/LaiCLLWCL09Thu, 01 Jan 2009 00:00:00 +0100 A Motion-Adaptive Deinterlacer via Hybrid Motion Detection and Edge-Pattern Recognition.https://doi.org/10.1155/2008/741290, , , :
A Motion-Adaptive Deinterlacer via Hybrid Motion Detection and Edge-Pattern Recognition. EURASIP J. Image Video Process. 2008 ()]]>https://dblp.org/rec/journals/ejivp/LeeWLL08Tue, 01 Jan 2008 00:00:00 +0100 On the efficient algorithm/architecture co-exploration for complex video processing.https://doi.org/10.1109/ICME.2008.4607620, , , :
On the efficient algorithm/architecture co-exploration for complex video processing. ICME : 1057-1060]]>https://dblp.org/rec/conf/icmcs/LeeWLL08Tue, 01 Jan 2008 00:00:00 +0100 Textural complexity-based rate control algorithm.https://doi.org/10.1109/ICME.2008.4607633, , :
Textural complexity-based rate control algorithm. ICME : 1109-1112]]>https://dblp.org/rec/conf/icmcs/LeeLW08Tue, 01 Jan 2008 00:00:00 +0100 A high-quality spatial-temporal content-adaptive deinterlacing algorithm.https://doi.org/10.1109/ISCAS.2008.4541987, , , , :
A high-quality spatial-temporal content-adaptive deinterlacing algorithm. ISCAS : 2594-2597]]>https://dblp.org/rec/conf/iscas/LeeLWLJ08Tue, 01 Jan 2008 00:00:00 +0100 Extraction of Perceptual Hue Feature Set for Color Image/Video Segmentation.https://doi.org/10.1007/978-3-540-89796-5_103, , :
Extraction of Perceptual Hue Feature Set for Color Image/Video Segmentation. PCM : 875-878]]>https://dblp.org/rec/conf/pcm/WangLL08aTue, 01 Jan 2008 00:00:00 +0100 On the verification of multi-standard SoC'S for reconfigurable video coding based on algorithm/architecture co-exploration.https://doi.org/10.1109/SIPS.2008.4671757, , , , :
On the verification of multi-standard SoC'S for reconfigurable video coding based on algorithm/architecture co-exploration. SiPS : 170-175]]>https://dblp.org/rec/conf/sips/LeeLWCC08Tue, 01 Jan 2008 00:00:00 +0100 Multiresolution-Based Texture Adaptive Algorithm for High-Quality Deinterlacing.https://doi.org/10.1093/ietisy/e90-d.11.1821, , , :
Multiresolution-Based Texture Adaptive Algorithm for High-Quality Deinterlacing. IEICE Trans. Inf. Syst. 90-D(11): 1821-1830 ()]]>https://dblp.org/rec/journals/ieicet/LeeLSW07Mon, 01 Jan 2007 00:00:00 +0100 Algorithm/Architecture Co-Design of 3-D Spatio-Temporal Motion Estimation for Video Coding.https://doi.org/10.1109/TMM.2006.889355, , , , :
Algorithm/Architecture Co-Design of 3-D Spatio-Temporal Motion Estimation for Video Coding. IEEE Trans. Multim. 9(3): 455-465 ()]]>https://dblp.org/rec/journals/tmm/LeeWLSL07Mon, 01 Jan 2007 00:00:00 +0100 Motion Adaptive Deinterlacing via Edge Pattern Recognition.https://doi.org/10.1109/ISCAS.2007.377961, , , :
Motion Adaptive Deinterlacing via Edge Pattern Recognition. ISCAS : 2662-2665]]>https://dblp.org/rec/conf/iscas/LeeLWL07Mon, 01 Jan 2007 00:00:00 +0100 A 3D Spatio-Temporal Motion Estimation Algorithm for Video Coding.https://doi.org/10.1109/ICME.2006.262405, , , , :
A 3D Spatio-Temporal Motion Estimation Algorithm for Video Coding. ICME : 741-744]]>https://dblp.org/rec/conf/icmcs/LeeWLSL06Sun, 01 Jan 2006 00:00:00 +0100 Multiresolution-based texture adaptive motion detection for de-interlacing.https://doi.org/10.1109/ISCAS.2006.1693584, , , :
Multiresolution-based texture adaptive motion detection for de-interlacing. ISCAS ]]>https://dblp.org/rec/conf/iscas/LeeSLW06Sun, 01 Jan 2006 00:00:00 +0100 Model-based optimal rate control algorithm for real-time hybrid video encoder.https://doi.org/10.1109/ISCAS.2006.1693618, , , , :
Model-based optimal rate control algorithm for real-time hybrid video encoder. ISCAS ]]>https://dblp.org/rec/conf/iscas/LinLWSL06Sun, 01 Jan 2006 00:00:00 +0100