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ORCIDTsung-Hsien Lin
This is just a disambiguation page, and is not intended to be the bibliography of an actual person. Any publication listed on this page has not been assigned to an actual author yet. If you know the true author of one of the publications listed below, you are welcome to contact us.
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2020 – today
- 2024
[j31]Chun-Yu Lin, Wei-Han Chen
, Yu-Ting Hung, Tun-Ju Wang, Tsung-Hsien Lin:
An Area-Efficient Low-Jitter Fractional Output Divider With Replica-DTC-Free Background Calibration. IEEE J. Solid State Circuits 59(11): 3705-3715 (2024)- [c58]Chia-Hsiang Chang, Pang-Cheng Chen, Hsiang-Chi Cheng, Chung-Hung Chen, Chun-Yen Lin, Chih-Ting Lin, Tsung-Hsien Lin:
A VCO-Based Readout ADC for Quasi-Static Sensing Applications in 3-µm Low-Temperature Poly-Silicon Thin-Film Transistor Technology. ISCAS 2024: 1-5 - 2023
- [j30]Wei-En Lee, Tsung-Hsien Lin:
A 0.6-V 12-bit Set-and-Down SAR ADC With a DAC-Based Bypass Window Switching Method. IEEE Trans. Circuits Syst. II Express Briefs 70(9): 3223-3227 (2023) - [j29]Tsung-Hsien Lin, Ying-Shuo Lee, Fu-Chieh Chang, J. Morris Chang, Pei-Yuan Wu:
Protecting Sensitive Attributes by Adversarial Training Through Class-Overlapping Techniques. IEEE Trans. Inf. Forensics Secur. 18: 1283-1294 (2023) - [c57]Tsung-Han Tsai, Yz-Heng Lin, Tsung-Hsien Lin:
Motion Artifact Correction in MRI using GAN-Based Channel Attention Transformer. BioCAS 2023: 1-5 - [c56]Mao-Ling Chiu, I-Fang Lo, Tsung-Hsien Lin:
A Time-Domain CCM/DCM Current-Mode Buck Converter with a PI Compensator Incorporating an Infinite Phase Shift Delay Line. ESSCIRC 2023: 441-444 - 2022
- [j28]Anna Zan, Zhong-Ru Xie, Yi-Chen Hsu, Yu-Hao Chen, Tsung-Hsien Lin, Yong-Shan Chang, Kuan Y. Chang:
DeepFlu: a deep learning approach for forecasting symptomatic influenza A infection based on pre-exposure gene expression. Comput. Methods Programs Biomed. 213: 106495 (2022) - [j27]Sung-Nien Yu, I-Mei Lin, San-Yu Wang, Yi-Cheng Hou, Sheng-Po Yao, Chun-Ying Lee, Chai-Jan Chang, Chih-Sheng Chu, Tsung-Hsien Lin:
Affective Computing Based on Morphological Features of Photoplethysmography for Patients with Hypertension. Sensors 22(22): 8771 (2022) - [j26]Chun-Yu Lin, Yu-Wei Huang, Tsung-Hsien Lin:
A Temperature-Compensated Crystal Oscillator With Piecewise Polynomial Varactor Compensation Achieving ±3.75-ppm Inaccuracy From -30°C to 90°C. IEEE Trans. Circuits Syst. II Express Briefs 69(4): 2016-2020 (2022) - [c55]Chien-Liang Chen, Tsung-Hsien Lin:
An Open-loop VCO-based ADC with Quasi-Chopping and Non-linearity Cancellation for Bio-Sensor Applications. BioCAS 2022: 317-320 - 2021
- [j25]Wei-En Lee, Chieh Tsou, Zhan-Xian Liao, Po-Yen Lu, Tsung-Hsien Lin, Shuenn-Yuh Lee, Chou-Ching K. Lin, Gia-Shing Shieh:
Intelligent Wireless EEG Measurement System With Electrical and Optogenetic Stimulation for Epileptic Seizure Detection and Suppression. IEEE Access 9: 80264-80274 (2021) - [c54]Chun-Yu Lin, Yu-Wei Huang, Tsung-Hsien Lin:
A ± 20-ppm -50°C-105°C 1-µA 32.768-kHz Clock Generator with a System-HFXO-Assisted Background Calibration. A-SSCC 2021: 1-3 - [c53]Chun-Yu Lin, Yu-Ting Hung, Tun-Ju Wang, Tsung-Hsien Lin:
29.5 A 0.008mm2 1.5mW 0.625-to-200MHz Fractional Output Divider with 120fsrms Jitter Based on Replica-DTC-Free Background Calibration. ISSCC 2021: 412-414 - [c52]Yen-Ting Chen, Mao-Ling Chiu, How-Wei Teng, Tsung-Hsien Lin:
A Hybrid Supply Modulator for 10-MHz LTE Power Amplifier with 17.3% PAE Improvement. VLSI-DAT 2021: 1-2 - 2020
- [j24]Chun-Yuan Chiu, Zhen-Cheng Zhang, Tsung-Hsien Lin:
Design of a 0.6-V, 429-MHz FSK Transceiver Using Q-Enhanced and Direct Power Transfer Techniques in 90-nm CMOS. IEEE J. Solid State Circuits 55(11): 3024-3035 (2020) - [c51]Chi-An Li, Wei-En Lee, Chi-Huan Lu, Sheng-Ying Lin, Tsung-Hsien Lin:
A Single-Comparator Active Rectifier with Auto-Calibration in 0.18-μm CMOS. ISCAS 2020: 1-4 - [c50]Po-Yu Li, Wei-En Lee, Ching-Tzung Lin, Li-Te Wu, Tsung-Hsien Lin:
A CMOS Temperature Sensor Based on a Chopped Continuous-Time Delta-Sigma Modulator. VLSI-DAT 2020: 1-2 - [c49]Chun-Yu Lin, Tun-Ju Wang, Yu-Ting Hung, Tsung-Hsien Lin:
A 1-200MHz Multiple Output Fractional Divider Using Phase Rotating Technique. VLSI-DAT 2020: 1-2 - [c48]Zhen-Cheng Zhang, Chun-Yuan Chiu, Hsiang-Cheng Yuan, Tsung-Hsien Lin:
A 0.5-V, 1.79-μW, 250-kbps Wake-up Receiver for IoT application in 90-nm CMOS. VLSI-DAT 2020: 1-4
2010 – 2019
- 2019
- [c47]Chun-Yu Lin, Yu-Ting Hung, Tsung-Hsien Lin:
A 2.4-GHz 500-µW 370-fsrms Integrated Jitter Sub-Sampling Sub-Harmonically Injection-Locked PLL in 90-nm CMOS. A-SSCC 2019: 91-94 - [c46]Mao-Ling Chiu, Tzu-Hsuan Yang, Tsung-Hsien Lin:
A High Accuracy Constant-On-Time Buck Converter with Spur-Free On-Time Generator. ISCAS 2019: 1-4 - [c45]Pei-Hsuan Huang, Chih-Chan Tu, Tsung-Hsien Lin:
An Area-Efficient VCO-Based Hall Sensor Readout System for Autofocus Applications. ISCAS 2019: 1-5 - [c44]Deng-Kai Lin, Chih-Chan Tu, Shih-Kai Kuo, Tsung-Hsien Lin:
An Analog Front-End Circuit for CO2 Sensor Readout in 0.18-µm CMOS Process. VLSI-DAT 2019: 1-4 - 2018
- [j23]Tsung-Hsien Lin, Chia-Hsiang Yang, Seung-Tak Ryu:
Introduction to the Special Section on the 2017 Asian Solid-State Circuits Conference (A-SSCC). IEEE J. Solid State Circuits 53(10): 2739-2740 (2018) - [c43]Mao-Ling Chiu, Tzu-Hsuan Yang, Tsung-Hsien Lin:
A Transient-Enhanced Constant On-Time Buck Converter with Light-Load Efficiency Optimization. A-SSCC 2018: 169-170 - 2017
- [j22]Chih-Chan Tu, Yu-Kai Wang, Tsung-Hsien Lin:
A Low-Noise Area-Efficient Chopped VCO-Based CTDSM for Sensor Applications in 40-nm CMOS. IEEE J. Solid State Circuits 52(10): 2523-2532 (2017) - [j21]Chan-Hsiang Weng, Yung-Yu Lin, Tsung-Hsien Lin:
A 1-V 5-MHz Bandwidth 68.3-dB SNDR Continuous-Time Delta-Sigma Modulator With a Feedback-Assisted Quantizer. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(5): 1085-1093 (2017) - [c42]Sheng-Ying Lin, Tsung-Hsien Lin:
An area-efficient amplifier-less digitally-controlled li-ion battery charger in 0.35μm CMOS. A-SSCC 2017: 37-40 - [c41]Chun-Yu Lin, Tun-Ju Wang, Tzu-Hsuan Liu, Tsung-Hsien Lin:
An ultra-low power 169-nA 32.768-kHz fractional-N PLL. A-SSCC 2017: 45-48 - [c40]Chih-Chan Tu, Feng-Wen Lee, Han-Chun Chen, Yu-Kai Wang, Tsung-Hsien Lin:
An area-efficient capacitively-coupled sensor readout circuit with current-splitting OTA and FIR-DAC. A-SSCC 2017: 57-60 - [c39]Chun-Yuan Chiu, Zhen-Cheng Zhang, Tsung-Hsien Lin:
A 0.6-V 200-kbps 429-MHz ultra-low-power FSK transceiver in 90-nm CMOS. A-SSCC 2017: 193-196 - [c38]Chun-Yu Lin, Tun-Ju Wang, Tsung-Hsien Lin:
A 1.5-GHz sub-sampling fractional-N PLL for spread-spectrum clock generator in 0.18-μm CMOS. A-SSCC 2017: 253-256 - [c37]Chun-Ta Wang, Hao-Hsiang Hou, Ping-Chien Chang, Keng-Hsien Lin, Cheng-Chang Li, Hung-Chang Jau, Yung-Jr Hung, Tsung-Hsien Lin:
Widely tunable guided-mode resonance filter using 90° twisted liquid crystal cladding. OFC 2017: 1-3 - [c36]Tzu-Ying Chen, Yi-Lin Tsai, Tsung-Hsien Lin:
A current feedback instrumentation amplifier with chopping and dynamic element matching techniques and employing the current-reuse technique in input/feedback stages. VLSI-DAT 2017: 1-4 - 2016
- [j20]Chan-Hsiang Weng, Tzu-An Wei, Erkan Alpman, Chang-Tsung Fu, Tsung-Hsien Lin:
A Continuous-Time Delta-Sigma Modulator Using ELD-Compensation-Embedded SAB and DWA-Inherent Time-Domain Quantizer. IEEE J. Solid State Circuits 51(5): 1235-1245 (2016) - [j19]Yi-Lin Tsai, Chun-Yu Lin, Bang-Cyuan Wang, Tsung-Hsien Lin:
A 330-µW 400-MHz BPSK Transmitter in 0.18- µm CMOS for Biomedical Applications. IEEE Trans. Circuits Syst. II Express Briefs 63-II(5): 448-452 (2016) - [c35]Chih-Chan Tu, Kuan-Chung Chen, Tsung-Yu Wu, Tsung-Hsien Lin:
An area-efficient wideband CMOS hall sensor system for camera autofocus systems. A-SSCC 2016: 33-36 - [c34]Chih-Chan Tu, Yu-Kai Wang, Tsung-Hsien Lin:
A 40-nV/VHz 0.0145-mm2 sensor readout circuit with chopped VCO-based CTDSM in 40-nm CMOS. A-SSCC 2016: 45-48 - [c33]Chun-Yu Lin, Tsung-Hsien Lin:
A 4-GHz ΔΣ fractional-N frequency synthesizer with 2-dimensional quantization noise pushing and fractional spur elimination techniques. A-SSCC 2016: 93-96 - [c32]Tse-Wei Wang, Yi-Lin Tsai, Chong-Rong Lee, Fu-Lian Hung, Tsung-Hsien Lin:
A 0.5-V sub-mW energy-efficient receiver in 0.18-μm CMOS for IoT applications. ISOCC 2016: 157-158 - 2015
- [j18]Chan-Hsiang Weng, Chun-Kuan Wu, Tsung-Hsien Lin:
A CMOS Thermistor-Embedded Continuous-Time Delta-Sigma Temperature Sensor With a Resolution FoM of 0.65 pJ°C2. IEEE J. Solid State Circuits 50(11): 2491-2500 (2015) - [c31]Chan-Hsiang Weng, Wei-Hsiang Huang, Erkan Alpman, Tsung-Hsien Lin:
A 13-MHz 68-dB SNDR CTDSM using SAB loop filter and interpolating flash quantizer with random-skip IDWA function in 90-nm CMOS. A-SSCC 2015: 1-4 - [c30]Tsung-Hsien Lin, Carlo Samori, Richard Schreier:
EP2: Lost art? Analog tricks and techniques from the masters. ISSCC 2015: 1 - [c29]Yi-Lin Tsai, Feng-Wen Lee, Tzu-Ying Chen, Tsung-Hsien Lin:
5.3 A 2-channel -83.2dB crosstalk 0.061mm2 CCIA with an orthogonal frequency chopping technique. ISSCC 2015: 1-3 - [c28]Chan-Hsiang Weng, Tzu-An Wei, Tsung-Hsien Lin:
A 127 fJ/conv. continuous-time delta-sigma modulator with a DWA-embedded two-step time-domain quantizer. VLSI-DAT 2015: 1-4 - 2014
- [j17]Chen-Chien Lin, Chan-Hsiang Weng, Tzu-An Wei, Yung-Yu Lin, Tsung-Hsien Lin:
A TDC-Based Two-Step Quantizer With Swapper Technique for a Multibit Continuous-Time Delta-Sigma Modulator. IEEE Trans. Circuits Syst. II Express Briefs 61-II(2): 75-79 (2014) - [c27]Chan-Hsiang Weng, Chun-Kuan Wu, Tsung-Hsien Lin:
A CMOS thermistor-embedded continuous-time delta-sigma temperature sensor with a resolution of 0.01 °C. A-SSCC 2014: 149-152 - [c26]Chih-Chan Tu, Feng-Wen Lee, Tsung-Hsien Lin:
An area-efficient capacitively-coupled instrumentation amplifier with a duty-cycled Gm-C DC servo loop in 0.18-μm CMOS. A-SSCC 2014: 153-156 - [c25]Chih-Chan Tu, Feng-Wen Lee, Dong-Feng Yeih, Tsung-Hsien Lin:
A 135-μW 0.46-mΩ/√Hz thoracic impedance variance monitor with square-wave current modulation. A-SSCC 2014: 305-308 - [c24]Fu-Chien Huang, Bang-Cyuan Wang, Yi-Lin Tsai, Tsung-Hsien Lin:
An Energy-Efficient QPSK Demodulation Scheme with Injection-Locking Technique for Green Radio Communication. iThings/GreenCom/CPSCom 2014: 614-617 - [c23]Fu-Chien Huang, Shou-Chen Hsu, Yi-Lin Tsai, Yung-Yu Lin, Tsung-Hsien Lin:
LMS-based digital background linearization technique for VCO-based delta-sigma ADC. MWSCAS 2014: 753-756 - [c22]Chun-Wei Tsai, Tsung-Hsien Lin, Ming-Chao Chiang:
Automatic elastic net clustering algorithm. SMC 2014: 2768-2773 - [c21]Chih-Chan Tu, Tsung-Hsien Lin:
Analog front-end amplifier for ECG applications with feed-forward EOS cancellation. VLSI-DAT 2014: 1-4 - [c20]Yi-Lin Tsai, Jian-You Chen, Bang-Cyuan Wang, Tzu-Yu Yeh, Tsung-Hsien Lin:
A 400MHz 10Mbps D-BPSK receiver with a reference-less dynamic phase-to-amplitude demodulation technique. VLSIC 2014: 1-2 - [c19]Chan-Hsiang Weng, Tzu-An Wei, Erkan Alpman, Chang-Tsung Fu, Yi-Ting Tseng, Tsung-Hsien Lin:
An 8.5MHz 67.2dB SNDR CTDSM with ELD compensation embedded twin-T SAB and circular TDC-based quantizer in 90nm CMOS. VLSIC 2014: 1-2 - 2013
- [j16]Yu-Jie Huang, Che-Wei Huang, Tsung-Hsien Lin, Chih-Ting Lin, Li-Guang Chen, Po-Yun Hsiao, Bi-Ru Wu, Hsiao-Ting Hsueh, Bing-Jye Kuo, Hann-Huei Tsai, Hsin-Hao Liao, Ying-Zong Juang, Chorng-Kuang Wang, Shey-Shi Lu:
A CMOS Cantilever-Based Label-Free DNA SoC With Improved Sensitivity for Hepatitis B Virus Detection. IEEE Trans. Biomed. Circuits Syst. 7(6): 820-831 (2013) - [j15]Yao-Hong Liu, Li-Guang Chen, Chun-Yu Lin, Tsung-Hsien Lin:
A 650-pJ/bit MedRadio Transmitter With an FIR-Embedded Phase Modulator for Medical Micro-Power Networks (MMNs). IEEE Trans. Circuits Syst. I Regul. Pap. 60-I(12): 3279-3288 (2013) - [c18]Chen-Chien Lin, Chan-Hsiang Weng, Tsung-Hsien Lin:
A low-power dual-mode continuous-time delta-sigma modulator with a folded quantizer. VLSI-DAT 2013: 1-4 - 2012
- [j14]Shen-Iuan Liu, Tsung-Hsien Lin, Woogeun Rhee:
Introduction to the Special Section on the 2011 Asian Solid-State Circuits Conference (A-SSCC). IEEE J. Solid State Circuits 47(11): 2551-2553 (2012) - [c17]Yi-Lin Tsai, Po-Yun Hsiao, Li-Guang Chen, Che-Wei Huang, Hsiao-Ting Hsueh, Chih-Chan Tu, Chih-Ting Lin, Shey-Shi Lu, Tsung-Hsien Lin:
A sensor-merged oscillator-based readout circuit for pizeo-resistive sensing applications. BioCAS 2012: 332-335 - [c16]Wei-Ning Liu, Tsung-Hsien Lin:
An energy-efficient ultra-wideband transmitter with an FIR pulse-shaping filter. VLSI-DAT 2012: 1-4 - [c15]Chun-Hong Lee, Hung-Chang Jau, Shih-Hui Chang, Tsung-Hsien Lin:
Simulation of laser phenomenon of cholesteric liquid crystal using axuillary differential equation finite-difference time-domain method. WOCC 2012: 180-182 - [c14]Hung-Chang Jau, Tsung-Hsien Lin, Yan-Yu Chen, Chun-Wei Chen, Jui-Hsiang Liu, Andy Y.-G. Fuh:
Electrical and optical switchings of the direcitons of cholesteric liquid crystals gratings. WOCC 2012: 183-185 - 2011
- [j13]Chen-Yen Ho, Wei-Shan Chan, Yung-Yu Lin, Tsung-Hsien Lin:
A Quadrature Bandpass Continuous-Time Delta-Sigma Modulator for a Tri-Mode GSM-EDGE/UMTS/DVB-T Receiver. IEEE J. Solid State Circuits 46(11): 2571-2582 (2011) - [j12]Chan-Hsiang Weng, Chen-Chien Lin, Yu-Cheng Chang, Tsung-Hsien Lin:
A 0.89-mW 1-MHz 62-dB SNDR Continuous-Time Delta-Sigma Modulator With an Asynchronous Sequential Quantizer and Digital Excess-Loop-Delay Compensation. IEEE Trans. Circuits Syst. II Express Briefs 58-II(12): 867-871 (2011) - [j11]Tsung-Hsien Lin, Chao-Ching Chi, Wei-Hao Chiu, Yu-Hsiang Huang:
A Synchronous 50% Duty-Cycle Clock Generator in 0.35- μ m CMOS. IEEE Trans. Very Large Scale Integr. Syst. 19(4): 585-591 (2011) - [c13]Yu-Cheng Chang, Wei-Hao Chiu, Chen-Chien Lin, Tsung-Hsien Lin:
A 4MHz BW 69dB SNDR continuous-time delta-sigma modulator with reduced sensitivity to clock jitter. A-SSCC 2011: 265-268 - [c12]Yao-Hong Liu, Hao-Hung Lo, Li-Guang Chen, Tsung-Hsien Lin:
A 15-mW 2.4-GHz IEEE 802.15.4 transmitter with a FIR-embedded phase modulator. A-SSCC 2011: 281-284 - [c11]Po-Yun Hsiao, Yao-Hong Liu, Tsung-Hsien Lin:
An energy-efficient super-regenerative ASK receiver with a ΔΣ-based pulse-width demodulator. A-SSCC 2011: 369-372 - 2010
- [j10]Wei-Hao Chiu, Yu-Hsiang Huang, Tsung-Hsien Lin:
A Dynamic Phase Error Compensation Technique for Fast-Locking Phase-Locked Loops. IEEE J. Solid State Circuits 45(6): 1137-1149 (2010) - [j9]Yao-Hong Liu, Tsung-Hsien Lin:
A Delta-Sigma Pulse-Width Digitization Technique for Super-Regenerative Receivers. IEEE J. Solid State Circuits 45(10): 2066-2079 (2010) - [c10]Chen-Yen Ho, Yung-Yu Lin, Tsung-Hsien Lin:
Dual-mode Continuous-Time Quadrature Bandpass ΔΣ modulator with Pseudo-random Quadrature mismatch shaping algorithm for Low-IF receiver application. ISCAS 2010: 25-28 - [c9]Wei-Hao Chiu, Chien-Yuan Cheng, Tsung-Hsien Lin:
A 5-GHz fractional-N phase-locked loop with spur reduction technique in 0.13-μm CMOS. ISCAS 2010: 2996-2999
2000 – 2009
- 2009
- [j8]Yao-Hong Liu, Tsung-Hsien Lin:
A Wideband PLL-Based G/FSK Transmitter in 0.18 µm CMOS. IEEE J. Solid State Circuits 44(9): 2452-2462 (2009) - [j7]Tsung-Hsien Lin, Ching-Lung Ti, Yao-Hong Liu:
Dynamic Current-Matching Charge Pump and Gated-Offset Linearization Technique for Delta-Sigma Fractional- N PLLs. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(5): 877-885 (2009) - 2008
- [c8]Yao-Hong Liu, Tsung-Hsien Lin:
A 3.5-mW 15-Mbps O-QPSK transmitter for real-time wireless medical imaging applications. CICC 2008: 599-602 - [c7]Ching-Lung Ti, Yao-Hong Liu, Tsung-Hsien Lin:
A 2.4-GHz fractional-N PLL with a PFD/CP linearization and an improved CP circuit. ISCAS 2008: 1728-1731 - 2007
- [j6]Tsung-Hsien Lin, Yu-Jen Lai:
An Agile VCO Frequency Calibration Technique for a 10-GHz CMOS PLL. IEEE J. Solid State Circuits 42(2): 340-349 (2007) - [j5]Tsung-Hsien Lin, Chin-Kung Wu, Ming-Chung Tsai:
A 0.8-V 0.25-mW Current-Mirror OTA With 160-MHz GBW in 0.18-μm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 54-II(2): 131-135 (2007) - [c6]Yao-Hong Liu, Tsung-Hsien Lin:
An energy-efficient 1.5-Mbps wireless FSK transmitter with A ∑Δ-modulated phase rotator. ESSCIRC 2007: 488-491 - [c5]Bojko Marholev, Michael Pan, Ed Chien, L. Zhang, Rozi Roufoogaran, Steve Wu, Iqbal Bhatti, Tsung-Hsien Lin, Michael S. Kappes, Shahla Khorram, Seema Butala Anand, Alireza Zolfaghari, Jesse Castaneda, C. M. Chien, Brima Ibrahim, Henrik Jensen, H. Kim, Paul Lettieri, Siukai Mak, Jack Lin, Y. C. Wong, R. Lee, M. Syed, Maryam Rofougaran, Ahmadreza Rofougaran:
A Single-Chip Bluetooth EDR Device in 0.13μm CMOS. ISSCC 2007: 558-759 - 2006
- [c4]Wai-Chi Fang, Tsung-Hsien Lin:
Low-Power Radio Design for Wireless Smart Sensor Networks. IIH-MSP 2006: 583-586 - 2004
- [j4]Tsung-Hsien Lin, William J. Kaiser, Gregory J. Pottie:
Integrated low-power communication system design for wireless sensor networks. IEEE Commun. Mag. 42(12): 142-150 (2004) - 2003
- [j3]Arya Behzad, Zhong Ming Shi, Seema Butala Anand, Li Lin, Keith A. Carter, Michael S. Kappes, Tsung-Hsien Lin, Thinh Nguyen, Dan Yuan, Stephen Wu, Y. C. Wong, Victor Fong, Ahmadreza Rofougaran:
A 5-GHz direct-conversion CMOS transceiver utilizing automatic frequency control for the IEEE 802.11a wireless LAN standard. IEEE J. Solid State Circuits 38(12): 2209-2220 (2003) - 2001
- [j2]Tsung-Hsien Lin, William J. Kaiser:
A 900-MHz 2.5-mA CMOS frequency synthesizer with an automatic SC tuning loop. IEEE J. Solid State Circuits 36(3): 424-431 (2001) - 2000
- [j1]Tsung-Hsien Lin:
High Speed Digital Transmission Networking: G. Held. Comput. Commun. 23(16): 1573 (2000) - [c3]Tsung-Hsien Lin, William J. Kaiser:
A 900 MHz, 2.5 mA CMOS frequency synthesizer with an automatic SC tuning loop. CICC 2000: 375-378
1990 – 1999
- 1999
- [c2]Razieh Rofougaran, Tsung-Hsien Lin, William J. Kaiser:
CMOS front-end LNA-mixer of micropower RF wireless systems. ISLPED 1999: 238-242 - 1998
- [c1]Tsung-Hsien Lin, Henry Sanchez, Razieh Rofougaran, William J. Kaiser:
CMOS front end components for micropower RF wireless systems. ISLPED 1998: 11-15
Coauthor Index
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