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Michael Thies
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2020 – today
- 2024
- [c22]Torben Miny, Michael Thies, Tobias Kleinert, Julian Vogel:
Deployment of Asset Administration Shell Submodels. ETFA 2024: 1-8 - [c21]Tarek Renusch, Alexander Boschmann, Michael Thies:
Efficient Domain Adaptation Using Individual Standardization in Bearing Fault Detection. ETFA 2024: 1-4 - 2023
- [j6]Torben Miny, Michael Thies, Lina Lukic, Sebastian Käbisch, Kazeem Oladipupo, Christian Diedrich, Tobias Kleinert:
Overview and Comparison of Asset Information Model Standards. IEEE Access 11: 99189-99221 (2023) - 2021
- [c20]Kirill Dorofeev, Sebastian Bergemann, Tarik Terzimehic, Julian Grothoff, Michael Thies, Alois Zoitl:
Generation of the Orchestrator Code for Skill-Based Automation Systems. ETFA 2021: 1-8 - [c19]Sten Grüner, Mario Hoernicke, Michael Thies, Gerrit Fachinger, Nicolas Camargo Torres, Tobias Kleinert:
A Reference Architecture for Modular Industrial Automation Systems. ETFA 2021: 1-8 - 2020
- [c18]Christoph Ostrau, Jonas Dominik Homburg, Christian Klarhorst, Michael Thies, Ulrich Rückert:
Benchmarking Deep Spiking Neural Networks on Neuromorphic Hardware. ICANN (2) 2020: 610-621 - [c17]Torben Miny, Michael Thies, Ulrich Epple, Christian Diedrich:
Model Transformation for Asset Administration Shells. IECON 2020: 2207-2212 - [c16]Christoph Ostrau, Christian Klarhorst, Michael Thies, Ulrich Rückert:
Benchmarking of Neuromorphic Hardware Systems. NICE 2020: 16:1-16:4 - [i1]Christoph Ostrau, Jonas Dominik Homburg, Christian Klarhorst, Michael Thies, Ulrich Rückert:
Benchmarking Deep Spiking Neural Networks on Neuromorphic Hardware. CoRR abs/2004.01656 (2020)
2010 – 2019
- 2019
- [c15]Christoph Ostrau, Christian Klarhorst, Michael Thies, Ulrich Rückert:
Comparing Neuromorphic Systems by Solving Sudoku Problems. HPCS 2019: 521-527 - [c14]Jonas Dominik Homburg, Michael Adams, Michael Thies, Timo Korthals, Marc Hesse, Ulrich Rückert:
Constraint Exploration of Convolutional Network Architectures with Neuroevolution. IWANN (2) 2019: 735-746 - 2017
- [j5]Andreas Stöckel, Christoph Jenzen, Michael Thies, Ulrich Rückert:
Binary Associative Memories as a Benchmark for Spiking Neuromorphic Hardware. Frontiers Comput. Neurosci. 11: 71 (2017) - 2016
- [c13]Martin Flasskamp, Gregor Sievers, Johannes Ax, Christian Klarhorst, Thorsten Jungeblut, Wayne Kelly, Michael Thies, Mario Porrmann:
Performance estimation of streaming applications for hierarchical MPSoCs. RAPIDO@HiPEAC 2016: 3:1-3:6 - 2011
- [j4]Fabian Moerchen, Michael Thies, Alfred Ultsch:
Efficient mining of all margin-closed itemsets with applications in temporal knowledge discovery and classification by compression. Knowl. Inf. Syst. 29(1): 55-80 (2011) - 2010
- [j3]Madhura Purnaprajna, Mario Porrmann, Ulrich Rückert, Michael Hussmann, Michael Thies, Uwe Kastens:
Runtime Reconfiguration of Multiprocessors Based on Compile-Time Analysis. ACM Trans. Reconfigurable Technol. Syst. 3(3): 17:1-17:25 (2010) - [c12]Thorsten Jungeblut, Ralf Dreesen, Mario Porrmann, Michael Thies, Ulrich Rückert, Uwe Kastens:
A Framework for the Design Space Exploration of Software-Defined Radio Applications. MOBILIGHT 2010: 148-159
2000 – 2009
- 2009
- [c11]Ralf Dreesen, Thorsten Jungeblut, Michael Thies, Mario Porrmann, Uwe Kastens, Ulrich Rückert:
A Synchronization Method for Register Traces of Pipelined Processors. IESS 2009: 207-217 - 2006
- [j2]Fabian Mörchen, Alfred Ultsch, Michael Thies, Ingo Lohken:
Modeling timbre distance with temporal statistics from polyphonic music. IEEE Trans. Speech Audio Process. 14(1): 81-90 (2006) - [c10]Christian Sauer, Matthias Gries, Jörg-Christian Niemann, Mario Porrmann, Michael Thies:
Application-Driven Development of Concurrent Packet Processing Platforms. PARELEC 2006: 55-61 - 2004
- [c9]Uwe Kastens, Dinh Khoi Le, Adrian Slowik, Michael Thies:
Feedback driven instruction-set extension. LCTES 2004: 126-135 - [c8]Matthias Grünewald, Dinh Khoi Le, Uwe Kastens, Jörg-Christian Niemann, Mario Porrmann, Ulrich Rückert, Adrian Slowik, Michael Thies:
Network Application Driven Instruction Set Extensions for Embedded Processing Clusters. PARELEC 2004: 209-214 - 2003
- [j1]Dirk Fischer, Jürgen Teich, Ralph Weper, Michael Thies:
BUILDABONG: A Framework for Architecture/Compiler Co-Exploration for ASIPs. J. Circuits Syst. Comput. 12(3): 353- (2003) - [c7]Olaf Bonorden, Nikolaus Brüls, Uwe Kastens, Dinh Khoi Le, Friedhelm Meyer auf der Heide, Jörg-Christian Niemann, Mario Porrmann, Ulrich Rückert, Adrian Slowik, Michael Thies:
A holistic methodology for network processor design. LCN 2003: 583- - 2002
- [b1]Michael Thies:
Combining static analysis of Java libraries with dynamic optimization. University of Paderborn, Germany, Shaker 2002, ISBN 978-3-8322-0177-7, pp. 1-326 - [c6]Dirk Fischer, Jürgen Teich, Michael Thies, Ralph Weper:
Efficient architecture/compiler co-exploration for ASIPs. CASES 2002: 27-34 - [c5]Michael Thies:
Annotating Java libraries in support of whole-program optimization. PPPJ/IRE 2002: 169-174 - 2001
- [c4]Dirk Fischer, Jürgen Teich, Ralph Weper, Uwe Kastens, Michael Thies:
Design space characterization for architecture/compiler co-exploration. CASES 2001: 108-115
1990 – 1999
- 1999
- [c3]Michael Thies:
A Closer Look at Inter-library Dependencies in Java-Software. Java-Informations-Tage 1999: 48-57 - 1998
- [c2]Esther Stümpel, Michael Thies, Uwe Kastens:
VLIW Compilation Techniques for Superscalar Architectures. CC 1998: 234-248 - [c1]Michael Thies, Uwe Kastens:
Statische Analyse von Bibliotheken als Grundlage dynamischer Optimierung. Java-Informations-Tage 1998: 323-339
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last updated on 2024-10-31 21:11 CET by the dblp team
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