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Cheng-Hong Li
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2010 – 2019
- 2014
- [c10]Arash Rezaei, Giuseppe Coviello, Cheng-Hong Li, Srimat T. Chakradhar, Frank Mueller:
Snapify: capturing snapshots of offload applications on xeon phi manycore processors. HPDC 2014: 1-12 - 2013
- [j4]Deepak Ajwani, Shoukat Ali, Kostas Katrinis, Cheng-Hong Li, Alfred J. Park, John P. Morrison, Eugen Schenfeld:
Generating synthetic task graphs for simulating stream computing systems. J. Parallel Distributed Comput. 73(10): 1362-1374 (2013) - [c9]Srihari Cadambi, Giuseppe Coviello, Cheng-Hong Li, Rajat Phull, Kunal Rao, Murugan Sankaradass, Srimat T. Chakradhar:
COSMIC: middleware for high performance and reliable multiprocessing on xeon phi coprocessors. HPDC 2013: 215-226 - 2012
- [j3]Alfred J. Park, Cheng-Hong Li, Ravi Nair, Nobuyuki Ohba, Uzi Shvadron, Ayal Zaks, Eugen Schenfeld:
Towards flexible exascale stream processing system simulation. Simul. 88(7): 832-851 (2012) - [c8]Yoonseo Choi, Cheng-Hong Li, Dilma Da Silva, Alan Bivens, Eugen Schenfeld:
Adaptive task duplication using on-line bottleneck detection for streaming applications. Conf. Computing Frontiers 2012: 163-172 - [c7]Rajat Phull, Cheng-Hong Li, Kunal Rao, Srihari Cadambi, Srimat T. Chakradhar:
Interference-driven resource management for GPU-based heterogeneous clusters. HPDC 2012: 109-120 - 2011
- [c6]Cheng-Hong Li, Alfred J. Park, Eugen Schenfeld:
Analytical Performance Modeling for Null Message-Based Parallel Discrete Event Simulation. MASCOTS 2011: 349-358 - [c5]Deepak Ajwani, Shoukat Ali, Kostas Katrinis, Cheng-Hong Li, Alfred J. Park, John P. Morrison, Eugen Schenfeld:
A Flexible Workload Generator for Simulating Stream Computing Systems. MASCOTS 2011: 409-417 - 2010
- [c4]Cheng-Hong Li, Sampada Sonalkar, Luca P. Carloni:
Exploiting local logic structures to optimize multi-core SoC floorplanning. DATE 2010: 1291-1296 - [c3]Alfred J. Park, Cheng-Hong Li, Ravi Nair, Nobuyuki Ohba, Uzi Shvadron, Ayal Zaks, Eugen Schenfeld:
Flow: A Stream Processing System Simulator. PADS 2010: 97-105
2000 – 2009
- 2009
- [j2]Cheng-Hong Li, Luca P. Carloni:
Leveraging Local Intracore Information to Increase Global Performance in Block-Based Design of Systems-on-Chip. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(2): 165-178 (2009) - 2007
- [c2]Cheng-Hong Li, Luca P. Carloni:
Using functional independence conditions to optimize the performance of latency-insensitive systems. ICCAD 2007: 32-39 - [c1]Cheng-Hong Li, Rebecca L. Collins, Sampada Sonalkar, Luca P. Carloni:
Design, Implementation, and Validation of a New Class of Interface Circuits for Latency-Insensitive Design. MEMOCODE 2007: 13-22 - 2003
- [j1]Yih-Kai Lin, Cheng-Hong Li, Hsu-Chun Yen:
Synthesis of Control Policies for Lossy Controlled Petri Nets. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 86-A(7): 1790-1798 (2003)
Coauthor Index
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