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ORCIDJongsun Kim
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2020 – today
- 2024
[j19]Taeyeon Kim, Jongsun Kim:
A shared TDC-based fast-lock all-digital DLL using a DCC-embedded delay line. Microelectron. J. 149: 106251 (2024)- 2023
- [c24]Yongseung Lee, Donghun Kim, Jongsun Kim:
A GaN Driver IC With a TDC-Based Dead-Time Controller For GaN DC-DC Buck Converters. ISOCC 2023: 33-34 - 2022
- [j18]Junghoon Jin, Seungjun Kim, Jongsun Kim
:
A Fast-Lock All-Digital Clock Generator for Energy Efficient Chiplet-Based Systems. IEEE Access 10: 124217-124226 (2022) - [c23]Chaeyoung Jang, Pil-Ho Lee, Sang-jae Rhee, Ki-hwan Choi, Jongsun Kim:
A Fast Lock All-Digital Programmable N/M-ratio MDLL Frequency Multiplier Using a Variable Resolution TDC. ICEIC 2022: 1-2 - 2021
- [c22]Taeyeon Kim, Jongsun Kim:
A 0.8-3.5 GHz Shared TDC-Based Fast-Lock All-Digital DLL with a Built-in DCC. ISCAS 2021: 1-4 - [c21]Junghoon Jin, Seungjun Kim, Sunguk Choi, Pil-Ho Lee, Sang-jae Rhee, Ki-hwan Choi, Jongsun Kim:
A 7.68 GHz Fast-Lock Low-Jitter Digital MDLL. ISOCC 2021: 311-312 - 2020
- [j17]Chihun Lee, Juwon Na, Kyongho Park, Hyeonjae Yu, Jongsun Kim, Kwonil Choi, Dongyong Park, Seongjin Park, Junsuk Rho, Seungchul Lee:
Development of Artificial Neural Network System to Recommend Process Conditions of Injection Molding for Various Geometries. Adv. Intell. Syst. 2(10): 2000037 (2020) - [j16]Dongjun Park, Jongsun Kim:
A 7-GHz Fast-Lock Two-Step Time-to-Digital Converter-Based All-Digital DLL. Circuits Syst. Signal Process. 39(4): 1715-1734 (2020) - [j15]Dongjun Park, Jongsun Kim:
A low-jitter 2.4 GHz all-digital MDLL with a dithering jitter reduction scheme for 256 times frequency multiplication. IEICE Electron. Express 17(19): 20200296 (2020) - [c20]Taeyeon Kim, Sunguk Choi, S. Han, Jongsun Kim:
An All-Digital MDLL for Programmable N/M-ratio Frequency Multiplication. ISOCC 2020: 230-231
2010 – 2019
- 2019
- [j14]Heejae Hwang, Jongsun Kim:
A 0.8-3.4 GHz process variation insensitive duty-cycle corrector for high-speed memory I/O links. IEICE Electron. Express 16(19): 20190505 (2019) - [c19]Heejae Hwang, Jongsun Kim:
A Low-Power 20 Gbps Multi-phase MDLL-based Digital CDR with Receiver Equalization. ISOCC 2019: 42-43 - 2018
- [j13]Jongsun Kim, B. H. Bae:
An anti-harmonic MDLL for phase-aligned on-chip clock multiplication. IEICE Electron. Express 15(5): 20180042 (2018) - [j12]Jongsun Kim, S. W. Han:
A low-power fast-lock DCC with a digital duty-cycle adjuster for LPDDR3 and LPDDR4 DRAMs. IEICE Electron. Express 15(7): 20180156 (2018) - [j11]Jongsun Kim, Sangwoo Han:
A Fast-Locking All-Digital Multiplying DLL for Fractional-Ratio Dynamic Frequency Scaling. IEEE Trans. Circuits Syst. II Express Briefs 65-II(3): 276-280 (2018) - [c18]Dongjun Park, Jongsun Kim:
A 7-GHz Fast-Lock 2-Step TDC-based All-Digital DLL for Post-DDR4 SDRAMs. ISCAS 2018: 1-4 - 2017
- [j10]Junsub Yoon, Seo Weon Heo, Jongsun Kim:
A fast-locking harmonic-free digital DLL for DDR3 and DDR4 SDRAMs. IEICE Electron. Express 14(2): 20161020 (2017) - [j9]Jongsun Kim, Bongho Bae:
A 2-4 GHz fast-locking frequency multiplying delay-locked loop. IEICE Electron. Express 14(2): 20161056 (2017) - [c17]Dongjun Park, Junsub Yoon, Jongsun Kim:
A low-power SerDes for high-speed on-chip networks. ISOCC 2017: 252-253 - [c16]Dongjun Park, Geontae Park, Jongsun Kim:
A 0.15 to 2.2 GHz all-digital delay-locked loop. NEWCAS 2017: 261-264 - 2016
- [c15]Junsub Yoon, Jongsun Kim:
A MDLL-based multi-phase clock multiplier. ISOCC 2016: 247-248 - [c14]Jongsun Kim, Bongho Bae:
A fast-locking clock multiplying DLL. ISOCC 2016: 253-254 - 2012
- [j8]Gyungsu Byun, Yanghyo Kim, Jongsun Kim, Sai-Wang Tam, Mau-Chung Frank Chang:
An Energy-Efficient and High-Speed Mobile Memory I/O Interface Using Simultaneous Bi-Directional Dual (Base+RF)-Band Signaling. IEEE J. Solid State Circuits 47(1): 117-130 (2012) - [c13]Seo Weon Heo, Jongsun Kim:
Double edge trailing PWM based full digital audio amplifier design. ICCE 2012: 251-252 - [c12]Sungken Lee, Geontae Park, Hyungtak Kim, Jongsun Kim:
A programmable delay-locked loop based clock multiplier. ISOCC 2012: 128-130 - 2011
- [j7]Jongsun Kim, Gyungsu Byun, M. Frank Chang:
A Low-Overhead and Low-Power RF Transceiver for Short-Distance On- and Off-Chip Interconnects. IEICE Trans. Electron. 94-C(5): 854-857 (2011) - [c11]Gyungsu Byun, Yanghyo Kim, Jongsun Kim, Sai-Wang Tam, Hsieh-Hung Hsieh, P.-Y. Wu, Chewnpu Jou, Jason Cong, Glenn Reinman, Mau-Chung Frank Chang:
An 8.4Gb/s 2.5pJ/b mobile memory I/O interface using simultaneous bidirectional Dual (Base+RF) band signaling. ISSCC 2011: 488-490 - 2010
- [j6]Hojung Ju, Jongsun Kim:
A low-power wideband multi-frequency synthesizer for mobile TV tuner ICs. IEICE Electron. Express 7(2): 92-97 (2010)
2000 – 2009
- 2009
- [j5]Jongsun Kim:
Area-efficient digitally controlled CMOS feedback delay element with programmable duty cycle. IEICE Electron. Express 6(4): 193-197 (2009) - 2008
- [j4]Jongsun Kim, Bo-Cheng Lai, Mau-Chung Frank Chang, Ingrid Verbauwhede:
A Cost-Effective Latency-Aware Memory Bus for Symmetric Multiprocessor Systems. IEEE Trans. Computers 57(12): 1714-1719 (2008) - 2007
- [j3]Jongsun Kim, Ingrid Verbauwhede, M.-C. Frank Chang:
Design of an Interconnect Architecture and Signaling Technology for Parallelism in Communication. IEEE Trans. Very Large Scale Integr. Syst. 15(8): 881-894 (2007) - [c10]Jongsun Kim, Chulhan Lee, Jaihie Kim:
A Changeable Biometric System That Uses Parts-Based Localized Representation for Face Recognition. AutoID 2007: 165-168 - [c9]Hyung Gu Lee, Chulhan Lee, Jeung-Yoon Choi, Jongsun Kim, Jaihie Kim:
Changeable Face Representations Suitable for Human Recognition. ICB 2007: 557-565 - 2005
- [j2]Jongsun Kim, Ingrid Verbauwhede, Mau-Chung Frank Chang:
A 5.6-mW 1-Gb/s/pair pulsed signaling transceiver for a fully AC coupled bus. IEEE J. Solid State Circuits 40(6): 1331-1340 (2005) - [j1]Jongsun Kim, Jongmoo Choi, Juneho Yi, Matthew A. Turk:
Effective Representation Using ICA for Face Recognition Robust to Local Distortion and Partial Occlusion. IEEE Trans. Pattern Anal. Mach. Intell. 27(12): 1977-1981 (2005) - [c8]Jongsun Kim, Juneho Yi:
Robust Face Recognition Based on Part-Based Localized Basis Images. ICIAP 2005: 1026-1034 - 2004
- [c7]Jongsun Kim, Jung-Hwan Choi, Changhyun Kim, A. F. Chang, Ingrid Verbauwhede:
A low power capacitive coupled bus interface based on pulsed signaling. CICC 2004: 35-38 - [c6]Jongsun Kim, Jongmoo Choi, Juneho Yi:
Face Recognition Based on Locally Salient ICA Information. ECCV Workshop BioAW 2004: 1-9 - [c5]Jongsun Kim, Jongmoo Choi, Juneho Yi:
ICA Based Face Recognition Robust to Partial Occlusions and Local Distortions. ICBA 2004: 147-154 - 2003
- [c4]Jongsun Kim, Zhiwei Xu, M. Frank Chang:
A 2-Gb/s/pin source synchronous CDMA bus interface with simultaneous multi-chip access and reconfigurable I/O capability. CICC 2003: 317-320 - [c3]Jongsun Kim, Zhiwei Xu, Mau-Chung Frank Chang:
Reconfigurable memory bus systems using multi-Gbps/pin CDMA I/O transceivers. ISCAS (2) 2003: 33-36 - [c2]Juneho Yi, Jiyoung Park, Jongsun Kim, Jongmoo Choi:
Robust Skin Color Segmentation Using a 2D Plane of RGB Color Space. ISCIS 2003: 413-420 - 2002
- [c1]Juneho Yi, Jongsun Kim, Jongmoo Choi, JungHyun Han, Eunseok Lee:
Face Recognition Based on ICA Combined with FLD. Biometric Authentication 2002: 10-18
Coauthor Index
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