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dblp: Ulrich Schmid https://dblp.org/pid/57/3614-1.html dblp person page RSS feed Mon, 28 Oct 2024 21:17:35 +0100 en-US daily 1 released under the CC0 1.0 license dblp@dagstuhl.de (dblp team) dblp@dagstuhl.de (dblp team) Computers/Computer_Science/Publications/Bibliographies http://www.rssboard.org/rss-specification https://dblp.org/img/logo.144x51.pngdblp: Ulrich Schmidhttps://dblp.org/pid/57/3614-1.html14451 The Time Complexity of Consensus Under Oblivious Message Adversaries.https://doi.org/10.1007/s00453-024-01209-4, , , , :
The Time Complexity of Consensus Under Oblivious Message Adversaries. Algorithmica 86(6): 1830-1861 ()]]>https://dblp.org/rec/journals/algorithmica/WinklerPGSS24Sat, 01 Jun 2024 01:00:00 +0200 A Logic for Repair and State Recovery in Byzantine Fault-Tolerant Multi-agent Systems.https://doi.org/10.1007/978-3-031-63501-4_7, , , :
A Logic for Repair and State Recovery in Byzantine Fault-Tolerant Multi-agent Systems. IJCAR (2) : 114-134]]>https://dblp.org/rec/conf/ijcar/DitmarschFKS24Mon, 01 Jan 2024 00:00:00 +0100 Network Abstractions for Characterizing Communication Requirements in Asynchronous Distributed Systems.https://doi.org/10.1007/978-3-031-60603-8_29, :
Network Abstractions for Characterizing Communication Requirements in Asynchronous Distributed Systems. SIROCCO : 501-506]]>https://dblp.org/rec/conf/sirocco/GaleanaS24Mon, 01 Jan 2024 00:00:00 +0100 A Logic for Repair and State Recovery in Byzantine Fault-tolerant Multi-agent Systems.https://doi.org/10.48550/arXiv.2401.06451, , , :
A Logic for Repair and State Recovery in Byzantine Fault-tolerant Multi-agent Systems. CoRR abs/2401.06451 ()]]>https://dblp.org/rec/journals/corr/abs-2401-06451Mon, 01 Jan 2024 00:00:00 +0100 Faithful Dynamic Timing Analysis of Digital Circuits Using Continuous Thresholded Mode-Switched ODEs.https://doi.org/10.48550/arXiv.2403.03235, , , , :
Faithful Dynamic Timing Analysis of Digital Circuits Using Continuous Thresholded Mode-Switched ODEs. CoRR abs/2403.03235 ()]]>https://dblp.org/rec/journals/corr/abs-2403-03235Mon, 01 Jan 2024 00:00:00 +0100 A Hybrid Delay Model for Interconnected Multi-Input Gates.https://doi.org/10.48550/arXiv.2403.10540, , , :
A Hybrid Delay Model for Interconnected Multi-Input Gates. CoRR abs/2403.10540 ()]]>https://dblp.org/rec/journals/corr/abs-2403-10540Mon, 01 Jan 2024 00:00:00 +0100 The Role of A Priori Belief in the Design and Analysis of Fault-Tolerant Distributed Systems.https://doi.org/10.1007/s11023-023-09631-3, , , :
The Role of A Priori Belief in the Design and Analysis of Fault-Tolerant Distributed Systems. Minds Mach. 33(2): 293-319 ()]]>https://dblp.org/rec/journals/mima/CignaraleSTK23Thu, 01 Jun 2023 01:00:00 +0200 A Digital Delay Model Supporting Large Adversarial Delay Variations.https://doi.org/10.1109/DDECS57882.2023.10139680, :
A Digital Delay Model Supporting Large Adversarial Delay Variations. DDECS : 111-117]]>https://dblp.org/rec/conf/ddecs/OhlingerS23Sun, 01 Jan 2023 00:00:00 +0100 A Hybrid Delay Model for Interconnected Multi-Input Gates.https://doi.org/10.1109/DSD60849.2023.00060, , , :
A Hybrid Delay Model for Interconnected Multi-Input Gates. DSD : 381-390]]>https://dblp.org/rec/conf/dsd/FerdowsiFSS23Sun, 01 Jan 2023 00:00:00 +0100 Logic of Communication Interpretation: How to Not Get Lost in Translation.https://doi.org/10.1007/978-3-031-43369-6_7, , , :
Logic of Communication Interpretation: How to Not Get Lost in Translation. FroCoS : 119-136]]>https://dblp.org/rec/conf/frocos/CignaraleKGS23Sun, 01 Jan 2023 00:00:00 +0100 Continuity of Thresholded Mode-Switched ODEs and Digital Circuit Delay Models.https://doi.org/10.1145/3575870.3587125, , , :
Continuity of Thresholded Mode-Switched ODEs and Digital Circuit Delay Models. HSCC : 10:1-10:11]]>https://dblp.org/rec/conf/hybrid/FerdowsiFN023Sun, 01 Jan 2023 00:00:00 +0100 Accurate Hybrid Delay Models for Dynamic Timing Analysis.https://doi.org/10.1109/ICCAD57390.2023.10323646, , :
Accurate Hybrid Delay Models for Dynamic Timing Analysis. ICCAD : 1-9]]>https://dblp.org/rec/conf/iccad/FerdowsiSS23Sun, 01 Jan 2023 00:00:00 +0100 The Time Complexity of Consensus Under Oblivious Message Adversaries.https://doi.org/10.4230/LIPIcs.ITCS.2023.100, , , , :
The Time Complexity of Consensus Under Oblivious Message Adversaries. ITCS : 100:1-100:28]]>https://dblp.org/rec/conf/innovations/WinklerPG0023Sun, 01 Jan 2023 00:00:00 +0100 A Sufficient Condition for Gaining Belief in Byzantine Fault-Tolerant Distributed Systems.https://doi.org/10.4204/EPTCS.379.37, :
A Sufficient Condition for Gaining Belief in Byzantine Fault-Tolerant Distributed Systems. TARK : 487-506]]>https://dblp.org/rec/journals/corr/abs-2304-00389Sun, 01 Jan 2023 00:00:00 +0100 A Digital Delay Model Supporting Large Adversarial Delay Variations.https://doi.org/10.48550/arXiv.2301.09588, :
A Digital Delay Model Supporting Large Adversarial Delay Variations. CoRR abs/2301.09588 ()]]>https://dblp.org/rec/journals/corr/abs-2301-09588Sun, 01 Jan 2023 00:00:00 +0100 Continuity of Thresholded Mode-Switched ODEs and Digital Circuit Delay Models.https://doi.org/10.48550/arXiv.2303.14048, , , :
Continuity of Thresholded Mode-Switched ODEs and Digital Circuit Delay Models. CoRR abs/2303.14048 ()]]>https://dblp.org/rec/journals/corr/abs-2303-14048Sun, 01 Jan 2023 00:00:00 +0100 Topological Characterization of Consensus Solvability in Directed Dynamic Networks.https://doi.org/10.48550/arXiv.2304.02316, , , , :
Topological Characterization of Consensus Solvability in Directed Dynamic Networks. CoRR abs/2304.02316 ()]]>https://dblp.org/rec/journals/corr/abs-2304-02316Sun, 01 Jan 2023 00:00:00 +0100 Epistemic and Topological Reasoning in Distributed Systems (Dagstuhl Seminar 23272).https://doi.org/10.4230/DagRep.13.7.34, , , , :
Epistemic and Topological Reasoning in Distributed Systems (Dagstuhl Seminar 23272). Dagstuhl Reports 13(7): 34-65 ()]]>https://dblp.org/rec/journals/dagstuhl-reports/CastanedaDKM023Sun, 01 Jan 2023 00:00:00 +0100 On Specifications and Proofs of Timed Circuits.https://doi.org/10.1007/978-3-031-22337-2_6, , :
On Specifications and Proofs of Timed Circuits. Principles of Systems Design : 107-130]]>https://dblp.org/rec/conf/birthday/Fugger0022Sat, 01 Jan 2022 00:00:00 +0100 A Simple Hybrid Model for Accurate Delay Modeling of a Multi-Input Gate.https://doi.org/10.23919/DATE54114.2022.9774547, , , :
A Simple Hybrid Model for Accurate Delay Modeling of a Multi-Input Gate. DATE : 1461-1466]]>https://dblp.org/rec/conf/date/FerdowsiMOS22Sat, 01 Jan 2022 00:00:00 +0100 Continuous Tasks and the Asynchronous Computability Theorem.https://doi.org/10.4230/LIPIcs.ITCS.2022.73, , :
Continuous Tasks and the Asynchronous Computability Theorem. ITCS : 73:1-73:27]]>https://dblp.org/rec/conf/innovations/GaleanaR022Sat, 01 Jan 2022 00:00:00 +0100 Time Complexity of Consensus in Dynamic Networks Under Oblivious Message Adversaries.https://arxiv.org/abs/2202.12397, , , , :
Time Complexity of Consensus in Dynamic Networks Under Oblivious Message Adversaries. CoRR abs/2202.12397 ()]]>https://dblp.org/rec/journals/corr/abs-2202-12397Sat, 01 Jan 2022 00:00:00 +0100 On Specifications and Proofs of Timed Circuits.https://doi.org/10.48550/arXiv.2208.08147, , :
On Specifications and Proofs of Timed Circuits. CoRR abs/2208.08147 ()]]>https://dblp.org/rec/journals/corr/abs-2208-08147Sat, 01 Jan 2022 00:00:00 +0100 An Accurate Hybrid Delay Model for Multi-Input Gates.https://doi.org/10.48550/arXiv.2211.10628, , :
An Accurate Hybrid Delay Model for Multi-Input Gates. CoRR abs/2211.10628 ()]]>https://dblp.org/rec/journals/corr/abs-2211-10628Sat, 01 Jan 2022 00:00:00 +0100 Optimal strategies for selecting coordinators.https://doi.org/10.1016/j.dam.2020.10.022, , :
Optimal strategies for selecting coordinators. Discret. Appl. Math. 289: 392-415 ()]]>https://dblp.org/rec/journals/dam/ZeinerSC21Fri, 01 Jan 2021 00:00:00 +0100 The Involution Tool for Accurate Digital Timing and Power Analysis.https://doi.org/10.1016/j.vlsi.2020.09.007, , , :
The Involution Tool for Accurate Digital Timing and Power Analysis. Integr. 76: 87-98 ()]]>https://dblp.org/rec/journals/integration/OhlingerMFS21Fri, 01 Jan 2021 00:00:00 +0100 Valency-Based Consensus Under Message Adversaries Without Limit-Closure.https://doi.org/10.1007/978-3-030-86593-1_32, , :
Valency-Based Consensus Under Message Adversaries Without Limit-Closure. FCT : 457-474]]>https://dblp.org/rec/conf/fct/WinklerSN21Fri, 01 Jan 2021 00:00:00 +0100 A Composable Glitch-Aware Delay Model.https://doi.org/10.1145/3453688.3461519, , , , :
A Composable Glitch-Aware Delay Model. ACM Great Lakes Symposium on VLSI : 147-154]]>https://dblp.org/rec/conf/glvlsi/0002O0FN21Fri, 01 Jan 2021 00:00:00 +0100 Round-Oblivious Stabilizing Consensus in Dynamic Networks.https://doi.org/10.1007/978-3-030-91081-5_11, :
Round-Oblivious Stabilizing Consensus in Dynamic Networks. SSS : 154-172]]>https://dblp.org/rec/conf/sss/SchwarzS21Fri, 01 Jan 2021 00:00:00 +0100 Fire!https://doi.org/10.4204/EPTCS.335.13, , :
Fire! TARK : 139-153]]>https://dblp.org/rec/journals/corr/abs-2106-11499Fri, 01 Jan 2021 00:00:00 +0100 A Composable Glitch-Aware Delay Model.https://arxiv.org/abs/2104.10966, , , , :
A Composable Glitch-Aware Delay Model. CoRR abs/2104.10966 ()]]>https://dblp.org/rec/journals/corr/abs-2104-10966Fri, 01 Jan 2021 00:00:00 +0100 Continuous Tasks and the Chromatic Simplicial Approximation Theorem.https://arxiv.org/abs/2109.01439, , :
Continuous Tasks and the Chromatic Simplicial Approximation Theorem. CoRR abs/2109.01439 ()]]>https://dblp.org/rec/journals/corr/abs-2109-01439Fri, 01 Jan 2021 00:00:00 +0100 A Simple Hybrid Model for Accurate Delay Modeling of a Multi-Input Gate.https://arxiv.org/abs/2111.11182, , , :
A Simple Hybrid Model for Accurate Delay Modeling of a Multi-Input Gate. CoRR abs/2111.11182 ()]]>https://dblp.org/rec/journals/corr/abs-2111-11182Fri, 01 Jan 2021 00:00:00 +0100 A Faithful Binary Circuit Model.https://doi.org/10.1109/TCAD.2019.2937748, , , :
A Faithful Binary Circuit Model. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(10): 2784-2797 ()]]>https://dblp.org/rec/journals/tcad/FuggerNNS20Wed, 01 Jan 2020 00:00:00 +0100 Precedence-Aware Automated Competitive Analysis of Real-Time Scheduling.https://doi.org/10.1109/TCAD.2020.3012803, , , :
Precedence-Aware Automated Competitive Analysis of Real-Time Scheduling. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(11): 3981-3992 ()]]>https://dblp.org/rec/journals/tcad/PavlogiannisSSC20Wed, 01 Jan 2020 00:00:00 +0100 The Persistence of False Memory: Brain in a Vat Despite Perfect Clocks.https://doi.org/10.1007/978-3-030-69322-0_30, , :
The Persistence of False Memory: Brain in a Vat Despite Perfect Clocks. PRIMA : 403-411]]>https://dblp.org/rec/conf/prima/Schlogl0K20Wed, 01 Jan 2020 00:00:00 +0100 A Faithful Binary Circuit Model with Adversarial Noise.https://arxiv.org/abs/2006.08485, , , , :
A Faithful Binary Circuit Model with Adversarial Noise. CoRR abs/2006.08485 ()]]>https://dblp.org/rec/journals/corr/abs-2006-08485Wed, 01 Jan 2020 00:00:00 +0100 The Persistence of False Memory: Brain in a Vat Despite Perfect Clocks.https://arxiv.org/abs/2011.01057, , :
The Persistence of False Memory: Brain in a Vat Despite Perfect Clocks. CoRR abs/2011.01057 ()]]>https://dblp.org/rec/journals/corr/abs-2011-01057Wed, 01 Jan 2020 00:00:00 +0100 On linear-time data dissemination in dynamic rooted trees.https://doi.org/10.1016/j.dam.2018.08.015, , :
On linear-time data dissemination in dynamic rooted trees. Discret. Appl. Math. 255: 307-319 ()]]>https://dblp.org/rec/journals/dam/ZeinerS019Tue, 01 Jan 2019 00:00:00 +0100 Consensus in rooted dynamic networks with short-lived stability.https://doi.org/10.1007/s00446-019-00348-0, , :
Consensus in rooted dynamic networks with short-lived stability. Distributed Comput. 32(5): 443-458 ()]]>https://dblp.org/rec/journals/dc/WinklerSS19Tue, 01 Jan 2019 00:00:00 +0100 An Overview of Recent Results for Consensus in Directed Dynamic Networks.http://bulletin.eatcs.org/index.php/beatcs/article/view/581/585, :
An Overview of Recent Results for Consensus in Directed Dynamic Networks. Bull. EATCS 128 ()]]>https://dblp.org/rec/journals/eatcs/WinklerS19Tue, 01 Jan 2019 00:00:00 +0100 Transistor-Level Analysis of Dynamic Delay Models.https://doi.org/10.1109/ASYNC.2019.00019, , , :
Transistor-Level Analysis of Dynamic Delay Models. ASYNC : 76-85]]>https://dblp.org/rec/conf/async/0002FN019Tue, 01 Jan 2019 00:00:00 +0100 Epistemic Reasoning with Byzantine-Faulty Agents.https://doi.org/10.1007/978-3-030-29007-8_15, , , :
Epistemic Reasoning with Byzantine-Faulty Agents. FroCos : 259-276]]>https://dblp.org/rec/conf/frocos/KuznetsP0F19Tue, 01 Jan 2019 00:00:00 +0100 A Characterization of Consensus Solvability for Closed Message Adversaries.https://doi.org/10.4230/LIPIcs.OPODIS.2019.17, , :
A Characterization of Consensus Solvability for Closed Message Adversaries. OPODIS : 17:1-17:16]]>https://dblp.org/rec/conf/opodis/Winkler0M19Tue, 01 Jan 2019 00:00:00 +0100 The Involution Tool for Accurate Digital Timingand Power Analysis.https://doi.org/10.1109/PATMOS.2019.8862165, , , :
The Involution Tool for Accurate Digital Timingand Power Analysis. PATMOS : 1-8]]>https://dblp.org/rec/conf/patmos/Ohlinger0F019Tue, 01 Jan 2019 00:00:00 +0100 2019 Principles of Distributed Computing Doctoral Dissertation Award.https://doi.org/10.1145/3293611.3341565, , , :
2019 Principles of Distributed Computing Doctoral Dissertation Award. PODC : 2]]>https://dblp.org/rec/conf/podc/JayantiLP019Tue, 01 Jan 2019 00:00:00 +0100 Topological Characterization of Consensus under General Message Adversaries.https://doi.org/10.1145/3293611.3331624, , :
Topological Characterization of Consensus under General Message Adversaries. PODC : 218-227]]>https://dblp.org/rec/conf/podc/Nowak0W19Tue, 01 Jan 2019 00:00:00 +0100 A Topological View of Partitioning Arguments: Reducing k-Set Agreement to Consensus.https://doi.org/10.1007/978-3-030-34992-9_25, , , :
A Topological View of Partitioning Arguments: Reducing k-Set Agreement to Consensus. SSS : 307-322]]>https://dblp.org/rec/conf/sss/GaleanaW0R19Tue, 01 Jan 2019 00:00:00 +0100 Causality and Epistemic Reasoning in Byzantine Multi-Agent Systems.https://doi.org/10.4204/EPTCS.297.19, , , :
Causality and Epistemic Reasoning in Byzantine Multi-Agent Systems. TARK : 293-312]]>https://dblp.org/rec/journals/corr/abs-1907-09112Tue, 01 Jan 2019 00:00:00 +0100 Topological Characterization of Consensus under General Message Adversaries.http://arxiv.org/abs/1905.09590, , :
Topological Characterization of Consensus under General Message Adversaries. CoRR abs/1905.09590 ()]]>https://dblp.org/rec/journals/corr/abs-1905-09590Tue, 01 Jan 2019 00:00:00 +0100 Automated competitive analysis of real-time scheduling with graph games.https://doi.org/10.1007/s11241-017-9293-4, , , :
Automated competitive analysis of real-time scheduling with graph games. Real Time Syst. 54(1): 166-207 ()]]>https://dblp.org/rec/journals/rts/ChatterjeePKS18Mon, 01 Jan 2018 00:00:00 +0100 Gracefully degrading consensus and k-set agreement in directed dynamic networks.https://doi.org/10.1016/j.tcs.2018.02.019, , , , :
Gracefully degrading consensus and k-set agreement in directed dynamic networks. Theor. Comput. Sci. 726: 41-77 ()]]>https://dblp.org/rec/journals/tcs/BielyRSSW18Mon, 01 Jan 2018 00:00:00 +0100 Verifying nonlinear analog and mixed-signal circuits with inputs.https://doi.org/10.1016/j.ifacol.2018.08.041, , , , , :
Verifying nonlinear analog and mixed-signal circuits with inputs. ADHS : 241-246]]>https://dblp.org/rec/conf/adhs/FanM0BM018Mon, 01 Jan 2018 00:00:00 +0100 A faithful binary circuit model with adversarial noise.https://doi.org/10.23919/DATE.2018.8342219, , , , :
A faithful binary circuit model with adversarial noise. DATE : 1327-1332]]>https://dblp.org/rec/conf/date/Fugger0NN018Mon, 01 Jan 2018 00:00:00 +0100 Self-Stabilizing High-Speed Communication in Multi-Synchronous GALS Architectures.https://doi.org/10.1109/IOLTS.2018.8474221, :
Self-Stabilizing High-Speed Communication in Multi-Synchronous GALS Architectures. IOLTS : 157-164]]>https://dblp.org/rec/conf/iolts/Perner018Mon, 01 Jan 2018 00:00:00 +0100 2018 Edsger W. Dijkstra Prize in Distributed Computing.https://doi.org/10.1145/3212734.3232540, , , , , :
2018 Edsger W. Dijkstra Prize in Distributed Computing. PODC : 1]]>https://dblp.org/rec/conf/podc/AfekKPRST18Mon, 01 Jan 2018 00:00:00 +0100 On the Strongest Message Adversary for Consensus in Directed Dynamic Networks.https://doi.org/10.1007/978-3-030-01325-7_13, , :
On the Strongest Message Adversary for Consensus in Directed Dynamic Networks. SIROCCO : 102-120]]>https://dblp.org/rec/conf/sirocco/0001SW18Mon, 01 Jan 2018 00:00:00 +0100 On Knowledge and Communication Complexity in Distributed Systems.https://doi.org/10.1007/978-3-030-01325-7_27, :
On Knowledge and Communication Complexity in Distributed Systems. SIROCCO : 312-330]]>https://dblp.org/rec/conf/sirocco/PflegerS18Mon, 01 Jan 2018 00:00:00 +0100 32nd International Symposium on Distributed Computing, DISC 2018, New Orleans, LA, USA, October 15-19, 2018.http://www.dagstuhl.de/dagpub/978-3-95977-092-7, :
32nd International Symposium on Distributed Computing, DISC 2018, New Orleans, LA, USA, October 15-19, 2018. LIPIcs 121, Schloss Dagstuhl - Leibniz-Zentrum für Informatik , ISBN 978-3-95977-092-7 [contents]]]>https://dblp.org/rec/conf/wdag/2018Mon, 01 Jan 2018 00:00:00 +0100 Verifying nonlinear analog and mixed-signal circuits with inputs.http://arxiv.org/abs/1803.02975, , , , , :
Verifying nonlinear analog and mixed-signal circuits with inputs. CoRR abs/1803.02975 ()]]>https://dblp.org/rec/journals/corr/abs-1803-02975Mon, 01 Jan 2018 00:00:00 +0100 A versatile architecture for long-term monitoring of single-event transient durations.https://doi.org/10.1016/j.micpro.2017.07.007, , :
A versatile architecture for long-term monitoring of single-event transient durations. Microprocess. Microsystems 53: 130-144 ()]]>https://dblp.org/rec/journals/mam/VeeravalliSS17Sun, 01 Jan 2017 00:00:00 +0100 Linear-Time Data Dissemination in Dynamic Networks.http://arxiv.org/abs/1701.06800, , :
Linear-Time Data Dissemination in Dynamic Networks. CoRR abs/1701.06800 ()]]>https://dblp.org/rec/journals/corr/SchwarzZS17Sun, 01 Jan 2017 00:00:00 +0100 HEX: Scaling honeycombs is easier than scaling clock trees.https://doi.org/10.1016/j.jcss.2016.03.001, , , , :
HEX: Scaling honeycombs is easier than scaling clock trees. J. Comput. Syst. Sci. 82(5): 929-956 ()]]>https://dblp.org/rec/journals/jcss/DolevFLPS16Fri, 01 Jan 2016 00:00:00 +0100 Unfaithful Glitch Propagation in Existing Binary Circuit Models.https://doi.org/10.1109/TC.2015.2435791, , :
Unfaithful Glitch Propagation in Existing Binary Circuit Models. IEEE Trans. Computers 65(3): 964-978 ()]]>https://dblp.org/rec/journals/tc/FuggerNS16Fri, 01 Jan 2016 00:00:00 +0100 Fast consensus under eventually stabilizing message adversaries.https://doi.org/10.1145/2833312.2833323, , :
Fast consensus under eventually stabilizing message adversaries. ICDCN : 7:1-7:10]]>https://dblp.org/rec/conf/icdcn/SchwarzWS16Fri, 01 Jan 2016 00:00:00 +0100 Consensus in Directed Dynamic Networks with Short-Lived Stability.http://arxiv.org/abs/1602.05852, , :
Consensus in Directed Dynamic Networks with Short-Lived Stability. CoRR abs/1602.05852 ()]]>https://dblp.org/rec/journals/corr/WinklerSS16Fri, 01 Jan 2016 00:00:00 +0100 Fault-tolerant Distributed Systems in Hardware.http://eatcs.org/beatcs/index.php/beatcs/article/view/348, , , , :
Fault-tolerant Distributed Systems in Hardware. Bull. EATCS 116 ()]]>https://dblp.org/rec/journals/eatcs/DolevFLSS15Thu, 01 Jan 2015 00:00:00 +0100 Building reliable systems-on-chip in nanoscale technologies.https://doi.org/10.1007/s00502-015-0319-0, , , , , , :
Building reliable systems-on-chip in nanoscale technologies. Elektrotech. Informationstechnik 132(6): 301-306 ()]]>https://dblp.org/rec/journals/ei/SteiningerZJHSS15Thu, 01 Jan 2015 00:00:00 +0100 The effect of forgetting on the performance of a synchronizer.https://doi.org/10.1016/j.peva.2015.08.002, , , , :
The effect of forgetting on the performance of a synchronizer. Perform. Evaluation 93: 1-16 ()]]>https://dblp.org/rec/journals/pe/FuggerKNSZ15Thu, 01 Jan 2015 00:00:00 +0100 Towards binary circuit models that faithfully capture physical solvability.http://dl.acm.org/citation.cfm?id=2757149, , , :
Towards binary circuit models that faithfully capture physical solvability. DATE : 1455-1460]]>https://dblp.org/rec/conf/date/FuggerNNS15Thu, 01 Jan 2015 00:00:00 +0100 Experimental Validation of a Faithful Binary Circuit Model.https://doi.org/10.1145/2742060.2742081, , , , , :
Experimental Validation of a Faithful Binary Circuit Model. ACM Great Lakes Symposium on VLSI : 355-360]]>https://dblp.org/rec/conf/glvlsi/NajvirtSHFNS15Thu, 01 Jan 2015 00:00:00 +0100 Gracefully Degrading Consensus and k-Set Agreement in Directed Dynamic Networks.https://doi.org/10.1007/978-3-319-26850-7_8, , , , :
Gracefully Degrading Consensus and k-Set Agreement in Directed Dynamic Networks. NETYS : 109-124]]>https://dblp.org/rec/conf/netys/Biely0SSW15Thu, 01 Jan 2015 00:00:00 +0100 Gracefully Degrading Consensus and k-Set Agreement in Directed Dynamic Networks.http://arxiv.org/abs/1501.02716, , , , :
Gracefully Degrading Consensus and k-Set Agreement in Directed Dynamic Networks. CoRR abs/1501.02716 ()]]>https://dblp.org/rec/journals/corr/Biely0SSW15Thu, 01 Jan 2015 00:00:00 +0100 Fast Consensus under Eventually Stabilizing Message Adversaries.http://arxiv.org/abs/1508.00851, , :
Fast Consensus under Eventually Stabilizing Message Adversaries. CoRR abs/1508.00851 ()]]>https://dblp.org/rec/journals/corr/SchwarzWS15Thu, 01 Jan 2015 00:00:00 +0100 Reconciling fault-tolerant distributed algorithms and real-time computing.https://doi.org/10.1007/s00446-013-0204-1, :
Reconciling fault-tolerant distributed algorithms and real-time computing. Distributed Comput. 27(3): 203-230 ()]]>https://dblp.org/rec/journals/dc/MoserS14Wed, 01 Jan 2014 00:00:00 +0100 Fault-tolerant algorithms for tick-generation in asynchronous logic: Robust pulse generation.https://doi.org/10.1145/2560561, , , :
Fault-tolerant algorithms for tick-generation in asynchronous logic: Robust pulse generation. J. ACM 61(5): 30:1-30:74 ()]]>https://dblp.org/rec/journals/jacm/DolevFSL14Wed, 01 Jan 2014 00:00:00 +0100 Rigorously modeling self-stabilizing fault-tolerant circuits: An ultra-robust clocking scheme for systems-on-chip.https://doi.org/10.1016/j.jcss.2014.01.001, , , , , :
Rigorously modeling self-stabilizing fault-tolerant circuits: An ultra-robust clocking scheme for systems-on-chip. J. Comput. Syst. Sci. 80(4): 860-900 ()]]>https://dblp.org/rec/journals/jcss/DolevFPSSL14Wed, 01 Jan 2014 00:00:00 +0100 The Generalized Loneliness Detector and Weak System Models for k-Set Agreement.https://doi.org/10.1109/TPDS.2013.77, , :
The Generalized Loneliness Detector and Weak System Models for k-Set Agreement. IEEE Trans. Parallel Distributed Syst. 25(4): 1078-1088 ()]]>https://dblp.org/rec/journals/tpds/BielyRS14Wed, 01 Jan 2014 00:00:00 +0100 Measuring SET pulsewidths in logic gates using digital infrastructure.https://doi.org/10.1109/ISQED.2014.6783331, , :
Measuring SET pulsewidths in logic gates using digital infrastructure. ISQED : 236-242]]>https://dblp.org/rec/conf/isqed/VeeravalliSS14Wed, 01 Jan 2014 00:00:00 +0100 Brief announcement: gracefully degrading consensus and k-set agreement under dynamic link failures.https://doi.org/10.1145/2611462.2611506, , , , :
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Starting a Dialog between Model Checking and Fault-tolerant Distributed Algorithms. CoRR abs/1210.3839 ()]]>https://dblp.org/rec/journals/corr/abs-1210-3839Sun, 01 Jan 2012 00:00:00 +0100 Counter Attack on Byzantine Generals: Parameterized Model Checking of Fault-tolerant Distributed Algorithms.http://arxiv.org/abs/1210.3846, , , , :
Counter Attack on Byzantine Generals: Parameterized Model Checking of Fault-tolerant Distributed Algorithms. CoRR abs/1210.3846 ()]]>https://dblp.org/rec/journals/corr/abs-1210-3846Sun, 01 Jan 2012 00:00:00 +0100 The Asynchronous Bounded-Cycle model.https://doi.org/10.1016/j.tcs.2010.08.001, :
The Asynchronous Bounded-Cycle model. Theor. Comput. Sci. 412(40): 5580-5601 ()]]>https://dblp.org/rec/journals/tcs/RobinsonS11Sat, 01 Jan 2011 00:00:00 +0100 Synchronous consensus under hybrid process and link failures.https://doi.org/10.1016/j.tcs.2010.09.032, , :
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Solving k-Set Agreement with Stable Skeleton Graphs. IPDPS Workshops : 1488-1495]]>https://dblp.org/rec/conf/ipps/BielyRS11Sat, 01 Jan 2011 00:00:00 +0100 Easy Impossibility Proofs for k-Set Agreement in Message Passing Systems.https://doi.org/10.1007/978-3-642-25873-2_21, , :
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Easy impossibility proofs for k-set agreement in message passing systems. PODC : 227-228]]>https://dblp.org/rec/conf/podc/BielyRS11Sat, 01 Jan 2011 00:00:00 +0100 Reconciling Fault-Tolerant Distributed Algorithms and Real-Time Computing - (Extended Abstract).https://doi.org/10.1007/978-3-642-22212-2_5, :
Reconciling Fault-Tolerant Distributed Algorithms and Real-Time Computing - (Extended Abstract). SIROCCO : 42-53]]>https://dblp.org/rec/conf/sirocco/MoserS11Sat, 01 Jan 2011 00:00:00 +0100 Fault-Tolerant Algorithms for Tick-Generation in Asynchronous Logic: Robust Pulse Generation - [Extended Abstract].https://doi.org/10.1007/978-3-642-24550-3_14, , , :
Fault-Tolerant Algorithms for Tick-Generation in Asynchronous Logic: Robust Pulse Generation - [Extended Abstract]. SSS : 163-177]]>https://dblp.org/rec/conf/sss/DolevFLS11Sat, 01 Jan 2011 00:00:00 +0100 Solving k-Set Agreement with Stable Skeleton Graphs.http://arxiv.org/abs/1102.4423, , :
Solving k-Set Agreement with Stable Skeleton Graphs. CoRR abs/1102.4423 ()]]>https://dblp.org/rec/journals/corr/abs-1102-4423Sat, 01 Jan 2011 00:00:00 +0100 Easy Impossibility Proofs for k-Set Agreement in Message Passing Systems.http://arxiv.org/abs/1103.3671, , :
Easy Impossibility Proofs for k-Set Agreement in Message Passing Systems. CoRR abs/1103.3671 ()]]>https://dblp.org/rec/journals/corr/abs-1103-3671Sat, 01 Jan 2011 00:00:00 +0100 Fault-tolerant Algorithms for Tick-Generation in Asynchronous Logic: Robust Pulse Generation.http://arxiv.org/abs/1105.4780, , , :
Fault-tolerant Algorithms for Tick-Generation in Asynchronous Logic: Robust Pulse Generation. CoRR abs/1105.4780 ()]]>https://dblp.org/rec/journals/corr/abs-1105-4780Sat, 01 Jan 2011 00:00:00 +0100 Topology control for fault-tolerant communication in wireless ad hoc networks.https://doi.org/10.1007/s11276-008-0139-9, , :
Topology control for fault-tolerant communication in wireless ad hoc networks. Wirel. Networks 16(2): 387-404 ()]]>https://dblp.org/rec/journals/winet/ThallnerMS10Fri, 01 Jan 2010 00:00:00 +0100 How to Speed-Up Fault-Tolerant Clock Generation in VLSI Systems-on-Chip via Pipelining.https://doi.org/10.1109/EDCC.2010.35, , :
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Synchrony and Time in Fault-Tolerant Distributed Algorithms - (Invited Tutorial). FORMATS : 46]]>https://dblp.org/rec/conf/formats/Schmid10Fri, 01 Jan 2010 00:00:00 +0100 The Theta-Model: achieving synchrony without clocks.https://doi.org/10.1007/s00446-009-0080-x, :
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Impossibility Results and Lower Bounds for Consensus under Link Failures. SIAM J. Comput. 38(5): 1912-1951 ()]]>https://dblp.org/rec/journals/siamcomp/SchmidWK09Thu, 01 Jan 2009 00:00:00 +0100 Chasing the Weakest System Model for Implementing Ω and Consensus.https://doi.org/10.1109/TDSC.2008.24, , , :
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Weak Synchrony Models and Failure Detectors for Message Passing (k-)Set Agreement. OPODIS : 285-299]]>https://dblp.org/rec/conf/opodis/BielyRS09Thu, 01 Jan 2009 00:00:00 +0100 Brief announcement: how to speed-up fault-tolerant clock generation in VLSI systems-on-chip via pipelining.https://doi.org/10.1145/1582716.1582762, , :
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Brief Announcement: Weak Synchrony Models and Failure Detectors for Message Passing (k-)Set Agreement. DISC : 360-361]]>https://dblp.org/rec/conf/wdag/BielyRS09Thu, 01 Jan 2009 00:00:00 +0100 Mapping a Fault-Tolerant Distributed Algorithm to Systems on Chip.https://doi.org/10.1109/DSD.2008.65, , , :
Mapping a Fault-Tolerant Distributed Algorithm to Systems on Chip. DSD : 242-249]]>https://dblp.org/rec/conf/dsd/FuchsFSS08Tue, 01 Jan 2008 00:00:00 +0100 Optimal Deterministic Remote Clock Estimation in Real-Time Systems.https://doi.org/10.1007/978-3-540-92221-6_24, :
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The asynchronous bounded-cycle model. PODC : 423]]>https://dblp.org/rec/conf/podc/RobinsonS08Tue, 01 Jan 2008 00:00:00 +0100 Keynote: Distributed Algorithms and VLSI.https://doi.org/10.1007/978-3-540-89335-6_3:
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The Asynchronous Bounded-Cycle Model. SSS : 246-262]]>https://dblp.org/rec/conf/sss/RobinsonS08Tue, 01 Jan 2008 00:00:00 +0100 Fault-Tolerant Distributed Algorithms on VLSI Chips, 07.09. - 10.09.2008.http://drops.dagstuhl.de/portals/08371/, , , :
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Booting clock synchronization in partially synchronous systems with hybrid process and link failures. Distributed Comput. 20(2): 115-140 ()]]>https://dblp.org/rec/journals/dc/WidderS07Mon, 01 Jan 2007 00:00:00 +0100 FIT-IT-Projekt DARTS: dezentrale fehlertolerante Taktgenerierung.https://doi.org/10.1007/s00502-006-0409-0, , :
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Interval-based clock synchronization with optimal precision. Inf. Comput. 186(1): 36-77 ()]]>https://dblp.org/rec/journals/iandc/SchmidS03Wed, 01 Jan 2003 00:00:00 +0100 Randomized Asynchronous Consensus with Imperfect Communications.https://doi.org/10.1109/RELDIS.2003.1238089, :
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NTI: A Network Time Interface M-Module for High-Accuracy Clock-Synchronization. IPPS/SPDP Workshops : 1067-1076]]>https://dblp.org/rec/conf/ipps/HorauerSS98Thu, 01 Jan 1998 00:00:00 +0100 Static priority scheduling of aperiodic real-time tasks.https://doi.org/10.1002/(SICI)1098-2418(199701/03)10:1/2<257::AID-RSA13%3E3.0.CO;2-5:
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