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ORCIDShibin Tang
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2020 – today
- 2022
[c11]Jinyi Deng
, Linyun Zhang, Lei Wang, Jiawei Liu, Kexiang Deng, Shibin Tang, Jiangyuan Gu, Boxiao Han, Fei Xu, Leibo Liu, Shaojun Wei, Shouyi Yin:
Mixed-granularity parallel coarse-grained reconfigurable architecture. DAC 2022: 343-348- 2021
- [j8]Kai Zhou, Shouyi Yin, Peng Ouyang, Yinan Liu, Shibin Tang:
Flexible Rectification of a Speckle Projection System for Depth Sensing. IEEE Trans. Instrum. Meas. 70: 1-13 (2021) - 2020
- [j7]Shixuan Zheng, Xianjue Zhang, Daoli Ou, Shibin Tang, Leibo Liu, Shaojun Wei, Shouyi Yin:
Efficient Scheduling of Irregular Network Structures on CNN Accelerators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(11): 3408-3419 (2020)
2010 – 2019
- 2019
- [j6]Shouyi Yin, Shibin Tang, Xinhan Lin, Peng Ouyang, Fengbin Tu, Leibo Liu, Shaojun Wei:
A High Throughput Acceleration for Hybrid Neural Networks With Efficient Resource Management on FPGA. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(4): 678-691 (2019) - [j5]Shouyi Yin, Shibin Tang, Xinhan Lin, Peng Ouyang, Fengbin Tu, Leibo Liu, Jishen Zhao, Cong Xu, Shuangchen Li, Yuan Xie, Shaojun Wei:
Parana: A Parallel Neural Architecture Considering Thermal Problem of 3D Stacked Memory. IEEE Trans. Parallel Distributed Syst. 30(1): 146-160 (2019) - 2018
- [j4]Shouyi Yin, Peng Ouyang, Shibin Tang, Fengbin Tu, Xiudong Li, Shixuan Zheng, Tianyi Lu, Jiangyuan Gu, Leibo Liu, Shaojun Wei:
A High Energy Efficient Reconfigurable Hybrid Neural Network Processor for Deep Learning Applications. IEEE J. Solid State Circuits 53(4): 968-982 (2018) - [c10]Jianxin Guo, Shouyi Yin, Peng Ouyang, Fengbin Tu, Shibin Tang, Leibo Liu, Shaojun Wei:
Bit-width Adaptive Accelerator Design for Convolution Neural Network. ISCAS 2018: 1-5 - 2017
- [j3]Fengbin Tu, Shouyi Yin, Peng Ouyang, Shibin Tang, Leibo Liu, Shaojun Wei:
Deep Convolutional Neural Network Architecture With Reconfigurable Computation Patterns. IEEE Trans. Very Large Scale Integr. Syst. 25(8): 2220-2233 (2017) - [c9]Xiaofan Zhang, Xinheng Liu, Anand Ramachandran, Chuanhao Zhuge, Shibin Tang, Peng Ouyang, Zuofu Cheng, Kyle Rupnow, Deming Chen:
High-performance video content recognition with long-term recurrent convolutional network for FPGA. FPL 2017: 1-4 - [c8]Shibin Tang, Shouyi Yin, Shixuan Zheng, Peng Ouyang, Fengbin Tu, Leiyue Yao, JinZhou Wu, Wenming Cheng, Leibo Liu, Shaojun Wei:
AEPE: An area and power efficient RRAM crossbar-based accelerator for deep CNNs. NVMSA 2017: 1-6 - 2014
- [j2]Fenglong Song, Shibin Tang, Wenming Li, Futao Miao, Hao Zhang, Dongrui Fan, Zhiyong Liu:
CRANarch: A feasible processor micro-architecture for Cloud Radio Access Network. Microprocess. Microsystems 38(8): 1025-1036 (2014) - 2013
- [j1]Zhengzhao Liang, Nuwen Xu, Ke Ma, Shibin Tang, Chunan Tang:
Microseismic Monitoring and Numerical Simulation of Rock Slope Failure. Int. J. Distributed Sens. Networks 9 (2013) - [c7]Xiaochun Ye, Dongrui Fan, Ninghui Sun, Shibin Tang, Mingzhe Zhang, Hao Zhang:
SimICT: A fast and flexible framework for performance and power evaluation of large-scale architecture. ISLPED 2013: 273-278 - [c6]Shibin Tang, Fenglong Song, Lingjun Fan, Yuanchao Xu, Dongrui Fan, Zhiyong Liu:
HRUL: A Hardware Assisted Recorder for User-Level Application. PDCAT 2013: 134-140 - 2011
- [c5]Lingjun Fan, Weisong Shi, Shibin Tang, Chenggang Yan, Dongrui Fan:
Optimizing Web Browser on Many-Core Architectures. PDCAT 2011: 173-178 - [p1]Carlos Kavka, Luka Onesti, Enrico Rigoni, Alessandro Turco, Sara Bocchio, Fabrizio Castro, Gianluca Palermo, Cristina Silvano, Vittorio Zaccaria, Giovanni Mariani, Dongrui Fan, Hao Zhang, Shibin Tang:
Design Space Exploration of Parallel Architectures. Multi-objective Design Space Exploration of Multiprocessor SoC Architectures 2011: 171-188 - 2010
- [c4]Fenglong Song, Zhiyong Liu, Dongrui Fan, Hao Zhang, Lei Yu, Shibin Tang:
Thread Owned Block Cache: Managing Latency in Many-Core Architecture. Euro-Par (1) 2010: 292-303 - [c3]Zhengmeng Lei, Lunkai Zhang, Fenglong Song, Shibin Tang, Dongrui Fan:
GVE: Godson-T Verification Engine for many-core architecture rapid prototyping and debugging. FPT 2010: 253-256 - [c2]Cristina Silvano, William Fornaciari, Gianluca Palermo, Vittorio Zaccaria, Fabrizio Castro, Marcos Martínez, Sara Bocchio, Roberto Zafalon, Prabhat Avasare, Geert Vanmeerbeeck, Chantal Ykman-Couvreur, Maryse Wouters, Carlos Kavka, Luka Onesti, Alessandro Turco, Umberto Bondi, Giovanni Mariani, Hector Posadas, Eugenio Villar, Chris Wu, Dongrui Fan, Hao Zhang, Shibin Tang:
MULTICUBE: Multi-Objective Design Space Exploration of Multi-Core Architectures. ISVLSI (Selected papers) 2010: 47-63 - [c1]Cristina Silvano, William Fornaciari, Gianluca Palermo, Vittorio Zaccaria, Fabrizio Castro, Marcos Martínez, Sara Bocchio, Roberto Zafalon, Prabhat Avasare, Geert Vanmeerbeeck, Chantal Ykman-Couvreur, Maryse Wouters, Carlos Kavka, Luka Onesti, Alessandro Turco, Umberto Bondi, Giovanni Mariani, Hector Posadas, Eugenio Villar, Chris Wu, Dongrui Fan, Hao Zhang, Shibin Tang:
MULTICUBE: Multi-objective Design Space Exploration of Multi-core Architectures. ISVLSI 2010: 488-493
Coauthor Index
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