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ORCIDNanditha Rao
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2020 – today
- 2024
[c7]Chithambara Moorthii J, Vinay Rayapati, Nanditha Rao, Manan Suri:
VPU-CIM: A 130nm, 33.98 TOPS/W RRAM based Compute-In-Memory Vector Co-Processor. ISCAS 2024: 1-5- [c6]Vinay Rayapati, Gogireddy Ravi Kiran Reddy, Gandi Ajay Kumar, Saketh Gajawada, Sanampudi Gopala Krishna Reddy, Nanditha Rao:
FPGA-based Hardware Software Co-design to Accelerate Brain Tumour Segmentation. ISCAS 2024: 1-5 - [c5]Jay Shah, Nanditha Rao:
Hybrid Multi-tile Vector Systolic Architecture for Accelerating Convolution on FPGAs. ISCAS 2024: 1-5 - [c4]Stefan Abi-Karam
, Rishov Sarkar, Allison Seigler, Sean Lowe, Zhigang Wei, Hanqiu Chen, Nanditha Rao, Lizy Kurian John, Aman Arora, Cong Hao:
HLSFactory: A Framework Empowering High-Level Synthesis Datasets for Machine Learning and Beyond. MLCAD 2024: 23:1-23:9 - [i1]Stefan Abi-Karam, Rishov Sarkar, Allison Seigler, Sean Lowe, Zhigang Wei, Hanqiu Chen, Nanditha Rao, Lizy Kurian John, Aman Arora, Cong Hao:
HLSFactory: A Framework Empowering High-Level Synthesis Datasets for Machine Learning and Beyond. CoRR abs/2405.00820 (2024) - 2023
- [c3]Anubhav Mishra, Nanditha Rao, Ganesh Gore, Xifan Tang:
Architectural Exploration of Heterogeneous FPGAs for Performance Enhancement of ML Benchmarks. APCCAS 2023: 232-235 - [c2]Archie Mishra, Nanditha Rao:
DSEAdd: FPGA based Design Space Exploration for Approximate Adders with Variable Bit-precision. ISQED 2023: 1-8 - 2022
- [j1]Jhalak Sharma, Nanditha Rao:
The Characterization of Errors in an FPGA-Based RISC-V Processor due to Single Event Transients. Microelectron. J. 123: 105392 (2022)
2010 – 2019
- 2019
- [c1]Nanditha Rao, Amir Haghighati Maleki, Fu Chi Chen, Wenjun Chen, C. Zhang, Navneet Kaur, Anwar Haque:
Analysis of the Effect of QoS on Video Conferencing QoE. IWCMC 2019: 1267-1272
Coauthor Index
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