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dblp: Polly Siegel

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Polly Siegel

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1990 – 1999

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1998
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  dblp key:
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  - https://dblp.org/rec/conf/islped/BeniniHS98
Luca Benini, Robin Hodgson, Polly Siegel:
System-level power estimation and optimization. ISLPED 1998: 173-178
1994
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Alan Marshall, Bill Coates, Polly Siegel:
Designing an Asynchronous Communications Chip. IEEE Des. Test Comput. 11(2): 8-21 (1994)
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Luca Benini, Polly Siegel, Giovanni De Micheli:
Saving Power by Synthesizing Gated Clocks for Sequential Circuits. IEEE Des. Test Comput. 11(4): 32-41 (1994)
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Polly Siegel, Giovanni De Micheli:
Decomposition methods for library binding of speed-independent asynchronous designs. ICCAD 1994: 558-565
1993
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Polly Siegel, Giovanni De Micheli, David L. Dill:
Automatic Technology Mapping for Generalized Fundamental-Mode Asynchronous Designs. DAC 1993: 61-67

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