José Luis Neves and Eby G. Friedman: Design methodology for synthesizing clock distribution networks exploiting nonzero localized clock skew. (1996)journals/tvlsi/NevesF9610.1109/92.502201Design methodology for synthesizing clock distribution networks exploiting nonzero localized clock skew.2José Luis Neves1Eby G. Friedman2286-291IEEE Trans. Very Large Scale Integr. Syst.IEEE Trans. Very Large Scale Integr. Syst.421996provenance information for RDF data of dblp record 'journals/tvlsi/NevesF96'2020-03-11T18:18:20+0100