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https://dblp.org/rec/journals/tvlsi/MinJKCSKK12.nt
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"Young-Jae Min et al.: A 0.31-1 GHz Fast-Corrected Duty-Cycle Corrector With Successive Approximation Register for DDR DRAM Applications. (2012)" .
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_:ID_ae74a1c7e3589c83c5bffae34332e604 . _:ID_ae74a1c7e3589c83c5bffae34332e604
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"journals/tvlsi/MinJKCSKK12" .
_:ID_b178d1d272b48e80ed47cd893ec46205 . _:ID_b178d1d272b48e80ed47cd893ec46205
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"10.1109/TVLSI.2011.2158011" .
"A 0.31-1 GHz Fast-Corrected Duty-Cycle Corrector With Successive Approximation Register for DDR DRAM Applications." .
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"7"^^
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_:Sig_4ab3b4f1f39e99c761ff0e0d5378e348_1 . _:Sig_4ab3b4f1f39e99c761ff0e0d5378e348_1
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"Young-Jae Min" . _:Sig_4ab3b4f1f39e99c761ff0e0d5378e348_1
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"1"^^
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_:Sig_4ab3b4f1f39e99c761ff0e0d5378e348_2 . _:Sig_4ab3b4f1f39e99c761ff0e0d5378e348_2
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"Chan-Hui Jeong" . _:Sig_4ab3b4f1f39e99c761ff0e0d5378e348_2
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"2"^^
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_:Sig_4ab3b4f1f39e99c761ff0e0d5378e348_3 . _:Sig_4ab3b4f1f39e99c761ff0e0d5378e348_3
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"Kyu-Young Kim" . _:Sig_4ab3b4f1f39e99c761ff0e0d5378e348_3
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"3"^^
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_:Sig_4ab3b4f1f39e99c761ff0e0d5378e348_4 . _:Sig_4ab3b4f1f39e99c761ff0e0d5378e348_4
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"Won Ho Choi" . _:Sig_4ab3b4f1f39e99c761ff0e0d5378e348_4
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"4"^^
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_:Sig_4ab3b4f1f39e99c761ff0e0d5378e348_5 . _:Sig_4ab3b4f1f39e99c761ff0e0d5378e348_5
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"Jong-Pil Son" . _:Sig_4ab3b4f1f39e99c761ff0e0d5378e348_5
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"5"^^
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_:Sig_4ab3b4f1f39e99c761ff0e0d5378e348_6 . _:Sig_4ab3b4f1f39e99c761ff0e0d5378e348_6
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"Chulwoo Kim" . _:Sig_4ab3b4f1f39e99c761ff0e0d5378e348_6
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"6"^^
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_:Sig_4ab3b4f1f39e99c761ff0e0d5378e348_7 . _:Sig_4ab3b4f1f39e99c761ff0e0d5378e348_7
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"Soo-Won Kim" . _:Sig_4ab3b4f1f39e99c761ff0e0d5378e348_7
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"7"^^
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"1524-1528" .
"IEEE Trans. Very Large Scale Integr. Syst." .
"IEEE Trans. Very Large Scale Integr. Syst." .
"20" .
"8" .
"2012"^^
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"provenance information for RDF data of dblp record 'journals/tvlsi/MinJKCSKK12'" .
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"2020-03-11T18:17:19+0100" .