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Link to original content: https://dblp.org/rec/journals/tvlsi/JiangP12.nt
. . . . "Weirong Jiang and Viktor K. Prasanna: Scalable Packet Classification on FPGA. (2012)" . . _:ID_ac59908dacc42df7844fbc3602f763b6 . _:ID_ac59908dacc42df7844fbc3602f763b6 . _:ID_ac59908dacc42df7844fbc3602f763b6 . _:ID_ac59908dacc42df7844fbc3602f763b6 . _:ID_ac59908dacc42df7844fbc3602f763b6 "journals/tvlsi/JiangP12" . _:ID_acf798d70e34de3a629ab646a0e260ac . _:ID_acf798d70e34de3a629ab646a0e260ac . _:ID_acf798d70e34de3a629ab646a0e260ac . _:ID_acf798d70e34de3a629ab646a0e260ac . _:ID_acf798d70e34de3a629ab646a0e260ac "10.1109/TVLSI.2011.2162112" . "Scalable Packet Classification on FPGA." . . . . . . "2"^^ . _:Sig_09f24b50569abdb3e1e876f8accdf372_1 . _:Sig_09f24b50569abdb3e1e876f8accdf372_1 . _:Sig_09f24b50569abdb3e1e876f8accdf372_1 . _:Sig_09f24b50569abdb3e1e876f8accdf372_1 "Weirong Jiang" . _:Sig_09f24b50569abdb3e1e876f8accdf372_1 . _:Sig_09f24b50569abdb3e1e876f8accdf372_1 . _:Sig_09f24b50569abdb3e1e876f8accdf372_1 "1"^^ . _:Sig_09f24b50569abdb3e1e876f8accdf372_1 . _:Sig_09f24b50569abdb3e1e876f8accdf372_2 . _:Sig_09f24b50569abdb3e1e876f8accdf372_2 . _:Sig_09f24b50569abdb3e1e876f8accdf372_2 . _:Sig_09f24b50569abdb3e1e876f8accdf372_2 "Viktor K. Prasanna" . _:Sig_09f24b50569abdb3e1e876f8accdf372_2 . _:Sig_09f24b50569abdb3e1e876f8accdf372_2 "2"^^ . _:Sig_09f24b50569abdb3e1e876f8accdf372_2 . . . . . "1668-1680" . "IEEE Trans. Very Large Scale Integr. Syst." . "IEEE Trans. Very Large Scale Integr. Syst." . "20" . "9" . "2012"^^ . "provenance information for RDF data of dblp record 'journals/tvlsi/JiangP12'" . . . . "2020-03-11T18:17:18+0100" .