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Link to original content: https://dblp.org/rec/journals/tvlsi/HwangLS12.ris
Provider: Schloss Dagstuhl - Leibniz Center for Informatics Database: dblp computer science bibliography Content:text/plain; charset="utf-8" TY - JOUR ID - DBLP:journals/tvlsi/HwangLS12 AU - Hwang, Yin-Tsung AU - Lin, Jin-Fa AU - Sheu, Ming-Hwa TI - Low-Power Pulse-Triggered Flip-Flop Design With Conditional Pulse-Enhancement Scheme. JO - IEEE Trans. Very Large Scale Integr. Syst. VL - 20 IS - 2 SP - 361 EP - 366 PY - 2012// DO - 10.1109/TVLSI.2010.2096483 UR - https://doi.org/10.1109/TVLSI.2010.2096483 ER -