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https://dblp.org/rec/journals/tecs/TsaiKLGW15.nt
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"Chun-Jen Tsai et al.: A Java Processor IP Design for Embedded SoC. (2015)" .
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_:ID_f6c7d9d9efc071584804ee7a5c19ab59 . _:ID_f6c7d9d9efc071584804ee7a5c19ab59
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"journals/tecs/TsaiKLGW15" .
_:ID_25f545599abed1d5199867fd78909928 . _:ID_25f545599abed1d5199867fd78909928
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"10.1145/2629649" .
"A Java Processor IP Design for Embedded SoC." .
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"5"^^
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_:Sig_ba2079984b49d09c0b5d8e38b7a30a9d_1 . _:Sig_ba2079984b49d09c0b5d8e38b7a30a9d_1
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"Chun-Jen Tsai" . _:Sig_ba2079984b49d09c0b5d8e38b7a30a9d_1
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"1"^^
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_:Sig_ba2079984b49d09c0b5d8e38b7a30a9d_2 . _:Sig_ba2079984b49d09c0b5d8e38b7a30a9d_2
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"Han-Wen Kuo" . _:Sig_ba2079984b49d09c0b5d8e38b7a30a9d_2
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"2"^^
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_:Sig_ba2079984b49d09c0b5d8e38b7a30a9d_3 . _:Sig_ba2079984b49d09c0b5d8e38b7a30a9d_3
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"Zi-Gang Lin" . _:Sig_ba2079984b49d09c0b5d8e38b7a30a9d_3
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"3"^^
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_:Sig_ba2079984b49d09c0b5d8e38b7a30a9d_4 . _:Sig_ba2079984b49d09c0b5d8e38b7a30a9d_4
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"Zi-Jing Guo" . _:Sig_ba2079984b49d09c0b5d8e38b7a30a9d_4
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"4"^^
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_:Sig_ba2079984b49d09c0b5d8e38b7a30a9d_5 . _:Sig_ba2079984b49d09c0b5d8e38b7a30a9d_5
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"Jun-Fu Wang" . _:Sig_ba2079984b49d09c0b5d8e38b7a30a9d_5
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"5"^^
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"35:1-35:25" .
"ACM Trans. Embed. Comput. Syst." .
"ACM Trans. Embed. Comput. Syst." .
"14" .
"2" .
"2015"^^
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"provenance information for RDF data of dblp record 'journals/tecs/TsaiKLGW15'" .
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"2020-09-08T13:29:17+0200" .