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https://dblp.org/rec/journals/tcasI/LiCCHZ23.nt
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"Yan Li et al.: DMBF: Design Metrics Balancing Framework for Soft-Error-Tolerant Digital Circuits Through Bayesian Optimization. (2023)" .
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_:ID_c46c66476a78cde99c6291efc0ac03a8 . _:ID_c46c66476a78cde99c6291efc0ac03a8
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"journals/tcasI/LiCCHZ23" .
_:ID_c50a6e90cbe97e2caa67d5a5efe3fff9 . _:ID_c50a6e90cbe97e2caa67d5a5efe3fff9
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"10.1109/TCSI.2023.3302341" .
"DMBF: Design Metrics Balancing Framework for Soft-Error-Tolerant Digital Circuits Through Bayesian Optimization." .
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"5"^^
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_:Sig_2205210a144f5da5f9fb4cb26a829364_1 . _:Sig_2205210a144f5da5f9fb4cb26a829364_1
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"Yan Li 0084" . _:Sig_2205210a144f5da5f9fb4cb26a829364_1
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"1"^^
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_:Sig_2205210a144f5da5f9fb4cb26a829364_2 . _:Sig_2205210a144f5da5f9fb4cb26a829364_2
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"Chao Chen" . _:Sig_2205210a144f5da5f9fb4cb26a829364_2
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"2"^^
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_:Sig_2205210a144f5da5f9fb4cb26a829364_3 . _:Sig_2205210a144f5da5f9fb4cb26a829364_3
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"Xu Cheng 0002" . _:Sig_2205210a144f5da5f9fb4cb26a829364_3
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"3"^^
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_:Sig_2205210a144f5da5f9fb4cb26a829364_4 . _:Sig_2205210a144f5da5f9fb4cb26a829364_4
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"Jun Han 0003" . _:Sig_2205210a144f5da5f9fb4cb26a829364_4
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"4"^^
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_:Sig_2205210a144f5da5f9fb4cb26a829364_5 . _:Sig_2205210a144f5da5f9fb4cb26a829364_5
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"Xiaoyang Zeng" . _:Sig_2205210a144f5da5f9fb4cb26a829364_5
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"5"^^
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"4015-4027" .
"IEEE Trans. Circuits Syst. I Regul. Pap." .
"IEEE Trans. Circuits Syst. I Regul. Pap." .
"70" .
"10" .
"2023"^^
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"--10"^^
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"provenance information for RDF data of dblp record 'journals/tcasI/LiCCHZ23'" .
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"2023-10-14T20:13:29+0200" .