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Link to original content: https://dblp.org/rec/journals/tcasI/GaoXLUR23.rdf
Zhen Gao et al.: A Methodology for the Design of Fault Tolerant Parallel Digital Channelizers on SRAM-FPGAs. (2023) journals/tcasI/GaoXLUR23 10.1109/TCSI.2023.3239040 A Methodology for the Design of Fault Tolerant Parallel Digital Channelizers on SRAM-FPGAs. 5 Zhen Gao 0005 1 Jiajun Xiao 2 Qiang Liu 0011 3 Anees Ullah 4 Pedro Reviriego 5 2003-2015 IEEE Trans. Circuits Syst. I Regul. Pap. IEEE Trans. Circuits Syst. I Regul. Pap. 70 5 2023 --05 provenance information for RDF data of dblp record 'journals/tcasI/GaoXLUR23' 2023-05-17T21:55:52+0200