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Link to original content: https://dblp.org/rec/journals/tcad/BurnsF98.nt
. . . . "Jeffrey L. Burns and Jack A. Feldman: C5M-a control-logic layout synthesis system for high-performance microprocessors. (1998)" . . _:ID_f4b7287fafd577ec86a8162b5e3de26d . _:ID_f4b7287fafd577ec86a8162b5e3de26d . _:ID_f4b7287fafd577ec86a8162b5e3de26d . _:ID_f4b7287fafd577ec86a8162b5e3de26d . _:ID_f4b7287fafd577ec86a8162b5e3de26d "journals/tcad/BurnsF98" . _:ID_dc27348ac16586e9de13ecb638fc9c8e . _:ID_dc27348ac16586e9de13ecb638fc9c8e . _:ID_dc27348ac16586e9de13ecb638fc9c8e . _:ID_dc27348ac16586e9de13ecb638fc9c8e . _:ID_dc27348ac16586e9de13ecb638fc9c8e "10.1109/43.673629" . "C5M-a control-logic layout synthesis system for high-performance microprocessors." . . . . . . "2"^^ . _:Sig_acef304e7eb339303ee01dfa2d1ba3b1_1 . _:Sig_acef304e7eb339303ee01dfa2d1ba3b1_1 . _:Sig_acef304e7eb339303ee01dfa2d1ba3b1_1 . _:Sig_acef304e7eb339303ee01dfa2d1ba3b1_1 "Jeffrey L. Burns" . _:Sig_acef304e7eb339303ee01dfa2d1ba3b1_1 . _:Sig_acef304e7eb339303ee01dfa2d1ba3b1_1 "1"^^ . _:Sig_acef304e7eb339303ee01dfa2d1ba3b1_1 . _:Sig_acef304e7eb339303ee01dfa2d1ba3b1_2 . _:Sig_acef304e7eb339303ee01dfa2d1ba3b1_2 . _:Sig_acef304e7eb339303ee01dfa2d1ba3b1_2 . _:Sig_acef304e7eb339303ee01dfa2d1ba3b1_2 "Jack A. Feldman" . _:Sig_acef304e7eb339303ee01dfa2d1ba3b1_2 . _:Sig_acef304e7eb339303ee01dfa2d1ba3b1_2 "2"^^ . _:Sig_acef304e7eb339303ee01dfa2d1ba3b1_2 . . . . . "14-23" . "IEEE Trans. Comput. Aided Des. Integr. Circuits Syst." . "IEEE Trans. Comput. Aided Des. Integr. Circuits Syst." . "17" . "1" . "1998"^^ . "provenance information for RDF data of dblp record 'journals/tcad/BurnsF98'" . . . . "2020-09-24T11:29:03+0200" .