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Link to original content: https://dblp.org/rec/journals/integration/PitaksanonkulTL89.rdf
Anucha Pitaksanonkul et al.: Bisection trees and half-quad trees: Memory and time efficient data structures for VLSI layout editors. (1989) journals/integration/PitaksanonkulTL89 10.1016/0167-9260(89)90021-7 Q56966900 Bisection trees and half-quad trees: Memory and time efficient data structures for VLSI layout editors. 3 Anucha Pitaksanonkul 1 Suchai Thanawastien 2 Chidchanok Lursinsap 3 285-300 Integr. Integr. 8 3 1989 provenance information for RDF data of dblp record 'journals/integration/PitaksanonkulTL89' 2020-02-20T13:22:01+0100