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Link to original content: https://dblp.org/rec/journals/ijcta/LiSHCJL23.rdf
Jinwei Li et al.: A 7.6-12.3 GHz wide-band PLL with an ultra low reference spur -81.1 dBc in 0.13 μm CMOS technology. (2023) journals/ijcta/LiSHCJL23 10.1002/CTA.3604 A 7.6-12.3 GHz wide-band PLL with an ultra low reference spur -81.1 dBc in 0.13 μm CMOS technology. 6 Jinwei Li 1 Bing Sun 2 Jiawei Huang 3 Hudong Chang 4 Rui Jia 5 Honggang Liu 6 3003-3016 Int. J. Circuit Theory Appl. Int. J. Circuit Theory Appl. 51 7 2023 --07 provenance information for RDF data of dblp record 'journals/ijcta/LiSHCJL23' 2023-08-05T00:02:41+0200