Daniel Fallnich et al.: Efficient ASIC Architectures for Low Latency Niederreiter Decryption. (2022)journals/iacr/FallnichZG22Efficient ASIC Architectures for Low Latency Niederreiter Decryption.3Daniel Fallnich1Shutao Zhang2Tobias Gemmeke3469IACR Cryptol. ePrint Arch.IACR Cryptol. ePrint Arch.20222022provenance information for RDF data of dblp record 'journals/iacr/FallnichZG22'2023-03-21T21:12:33+0100