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Link to original content: https://dblp.org/rec/conf/vts/NakamuraSF06.html?view=bibtex
dblp: BibTeX record conf/vts/NakamuraSF06

BibTeX record conf/vts/NakamuraSF06

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@inproceedings{DBLP:conf/vts/NakamuraSF06,
  author       = {Yoshiyuki Nakamura and
                  Jacob Savir and
                  Hideo Fujiwara},
  title        = {{BIST} Pretest of ICs: Risks and Benefits},
  booktitle    = {24th {IEEE} {VLSI} Test Symposium {(VTS} 2006), 30 April - 4 May 2006,
                  Berkeley, California, {USA}},
  pages        = {142--149},
  publisher    = {{IEEE} Computer Society},
  year         = {2006},
  url          = {https://doi.org/10.1109/VTS.2006.23},
  doi          = {10.1109/VTS.2006.23},
  timestamp    = {Fri, 24 Mar 2023 00:04:04 +0100},
  biburl       = {https://dblp.org/rec/conf/vts/NakamuraSF06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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