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Link to original content: https://dblp.org/rec/conf/vlsit/ZhuWZWL022.nt
. . . . "Wei Zhu et al.: An Ultra-compact Bidirectional T/R Folded 25.8-39.2GHz Phased-Array Transceiver Front-End with Embedded TX Power Detection/Self-calibration Path Supporting 64-/256-/512-QAM at 28-/39-GHz band for 5G in 65nm CMOS Technology. (2022)" . . _:ID_73a52aae493be88285605f8d340bcdc1 . _:ID_73a52aae493be88285605f8d340bcdc1 . _:ID_73a52aae493be88285605f8d340bcdc1 . _:ID_73a52aae493be88285605f8d340bcdc1 . _:ID_73a52aae493be88285605f8d340bcdc1 "conf/vlsit/ZhuWZWL022" . _:ID_8b4042f35c474a45af8dfdf1e46a16a1 . _:ID_8b4042f35c474a45af8dfdf1e46a16a1 . _:ID_8b4042f35c474a45af8dfdf1e46a16a1 . _:ID_8b4042f35c474a45af8dfdf1e46a16a1 . _:ID_8b4042f35c474a45af8dfdf1e46a16a1 "10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830312" . "An Ultra-compact Bidirectional T/R Folded 25.8-39.2GHz Phased-Array Transceiver Front-End with Embedded TX Power Detection/Self-calibration Path Supporting 64-/256-/512-QAM at 28-/39-GHz band for 5G in 65nm CMOS Technology." . . . . . . . . . . . . . . "6"^^ . _:Sig_5a3325f57a85963e6bee5ad465557b7d_1 . _:Sig_5a3325f57a85963e6bee5ad465557b7d_1 . _:Sig_5a3325f57a85963e6bee5ad465557b7d_1 . _:Sig_5a3325f57a85963e6bee5ad465557b7d_1 "Wei Zhu 0017" . _:Sig_5a3325f57a85963e6bee5ad465557b7d_1 . _:Sig_5a3325f57a85963e6bee5ad465557b7d_1 "1"^^ . _:Sig_5a3325f57a85963e6bee5ad465557b7d_1 . _:Sig_5a3325f57a85963e6bee5ad465557b7d_2 . _:Sig_5a3325f57a85963e6bee5ad465557b7d_2 . _:Sig_5a3325f57a85963e6bee5ad465557b7d_2 . _:Sig_5a3325f57a85963e6bee5ad465557b7d_2 "Ruitao Wang" . _:Sig_5a3325f57a85963e6bee5ad465557b7d_2 . _:Sig_5a3325f57a85963e6bee5ad465557b7d_2 . _:Sig_5a3325f57a85963e6bee5ad465557b7d_2 "2"^^ . _:Sig_5a3325f57a85963e6bee5ad465557b7d_2 . _:Sig_5a3325f57a85963e6bee5ad465557b7d_3 . _:Sig_5a3325f57a85963e6bee5ad465557b7d_3 . _:Sig_5a3325f57a85963e6bee5ad465557b7d_3 . _:Sig_5a3325f57a85963e6bee5ad465557b7d_3 "Jian Zhang" . _:Sig_5a3325f57a85963e6bee5ad465557b7d_3 . _:Sig_5a3325f57a85963e6bee5ad465557b7d_3 "3"^^ . _:Sig_5a3325f57a85963e6bee5ad465557b7d_3 . _:Sig_5a3325f57a85963e6bee5ad465557b7d_4 . _:Sig_5a3325f57a85963e6bee5ad465557b7d_4 . _:Sig_5a3325f57a85963e6bee5ad465557b7d_4 . _:Sig_5a3325f57a85963e6bee5ad465557b7d_4 "Jiawen Wang" . _:Sig_5a3325f57a85963e6bee5ad465557b7d_4 . _:Sig_5a3325f57a85963e6bee5ad465557b7d_4 "4"^^ . _:Sig_5a3325f57a85963e6bee5ad465557b7d_4 . _:Sig_5a3325f57a85963e6bee5ad465557b7d_5 . _:Sig_5a3325f57a85963e6bee5ad465557b7d_5 . _:Sig_5a3325f57a85963e6bee5ad465557b7d_5 . _:Sig_5a3325f57a85963e6bee5ad465557b7d_5 "Chenguang Li" . _:Sig_5a3325f57a85963e6bee5ad465557b7d_5 . _:Sig_5a3325f57a85963e6bee5ad465557b7d_5 "5"^^ . _:Sig_5a3325f57a85963e6bee5ad465557b7d_5 . _:Sig_5a3325f57a85963e6bee5ad465557b7d_6 . _:Sig_5a3325f57a85963e6bee5ad465557b7d_6 . _:Sig_5a3325f57a85963e6bee5ad465557b7d_6 . _:Sig_5a3325f57a85963e6bee5ad465557b7d_6 "Yan Wang 0023" . _:Sig_5a3325f57a85963e6bee5ad465557b7d_6 . _:Sig_5a3325f57a85963e6bee5ad465557b7d_6 "6"^^ . _:Sig_5a3325f57a85963e6bee5ad465557b7d_6 . . . . . . "102-103" . "VLSI Technology and Circuits" . "VLSI Technology and Circuits" . "2022"^^ . "2022"^^ . . "provenance information for RDF data of dblp record 'conf/vlsit/ZhuWZWL022'" . . . . "2024-02-05T20:32:45+0100" .