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https://dblp.org/rec/conf/vlsid/SimonBN95.nt
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"Sven Simon et al.: Retiming of synchronous circuits with variable topology. (1995)" .
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_:ID_06c1e8dffcc4c2dd6031f80776ec9dde . _:ID_06c1e8dffcc4c2dd6031f80776ec9dde
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"conf/vlsid/SimonBN95" .
_:ID_22c51bb19375c05ae2e7763b3056ea09 . _:ID_22c51bb19375c05ae2e7763b3056ea09
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"10.1109/ICVD.1995.512091" .
"Retiming of synchronous circuits with variable topology." .
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"3"^^
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_:Sig_238cb9849f87e6217cfcc8ac19afc122_1 . _:Sig_238cb9849f87e6217cfcc8ac19afc122_1
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"Sven Simon 0001" . _:Sig_238cb9849f87e6217cfcc8ac19afc122_1
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"1"^^
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_:Sig_238cb9849f87e6217cfcc8ac19afc122_2 . _:Sig_238cb9849f87e6217cfcc8ac19afc122_2
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"Ralf Bucher" . _:Sig_238cb9849f87e6217cfcc8ac19afc122_2
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"2"^^
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_:Sig_238cb9849f87e6217cfcc8ac19afc122_3 . _:Sig_238cb9849f87e6217cfcc8ac19afc122_3
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"Josef A. Nossek" . _:Sig_238cb9849f87e6217cfcc8ac19afc122_3
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"3"^^
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"130-134" .
"VLSI Design" .
"VLSI Design" .
"1995"^^
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"1995"^^
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"provenance information for RDF data of dblp record 'conf/vlsid/SimonBN95'" .
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"2023-03-24T00:04:01+0100" .
