iBet uBet web content aggregator. Adding the entire web to your favor.
iBet uBet web content aggregator. Adding the entire web to your favor.



Link to original content: https://dblp.org/rec/conf/vlsi/YalcinH06.ris
Provider: Schloss Dagstuhl - Leibniz Center for Informatics Database: dblp computer science bibliography Content:text/plain; charset="utf-8" TY - CPAPER ID - DBLP:conf/vlsi/YalcinH06 AU - Yalcin, Sinan AU - Hamzaoglu, Ilker TI - A High Performance Hardware Architecture for Half-Pixel Accurate H.264 Motion Estimation. BT - IFIP VLSI-SoC 2006, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Nice, France, 16-18 October 2006 SP - 63 EP - 67 PY - 2006// DO - 10.1109/VLSISOC.2006.313205 UR - https://doi.org/10.1109/VLSISOC.2006.313205 ER -