Provider: Schloss Dagstuhl - Leibniz Center for Informatics
Database: dblp computer science bibliography
Content:text/plain; charset="utf-8"
TY - CPAPER
ID - DBLP:conf/ivsw/SinglaLG19
AU - Singla, Aayush
AU - Lippmann, Bernhard
AU - Graeb, Helmut
TI - Verification of Physical Chip Layouts Using GDSII Design Data.
BT - 4th IEEE International Verification and Security Workshop, IVSW 2019, Rhodes Island, Greece, July 1-3, 2019
SP - 55
EP - 60
PY - 2019//
DO - 10.1109/IVSW.2019.8854432
UR - https://doi.org/10.1109/IVSW.2019.8854432
ER -
