Eduarde D. BrandãoJoao P. NespoloRenato D. PeraltaPaulo F. ButzenAndré Inácio ReisPossible Reductions to Generate circuits from BDDs.406-4092022ISVLSIhttps://doi.org/10.1109/ISVLSI54635.2022.00091conf/isvlsi/2022db/conf/isvlsi/isvlsi2022.html#BrandaoNPBR22