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Link to original content: https://dblp.org/rec/conf/issoc/TatenguemSGRB12.ris
Provider: Schloss Dagstuhl - Leibniz Center for Informatics Database: dblp computer science bibliography Content:text/plain; charset="utf-8" TY - CPAPER ID - DBLP:conf/issoc/TatenguemSGRB12 AU - Tatenguem, Hervé AU - Strano, Alessandro AU - Govind, Vineeth AU - Raik, Jaan AU - Bertozzi, Davide TI - Ultra-low latency NoC testing via pseudo-random test pattern compaction. BT - 2012 International Symposium on System on Chip, ISSoC 2012, Tampere, Finland, October 10-12, 2012 SP - 1 EP - 6 PY - 2012// DO - 10.1109/ISSOC.2012.6376370 UR - https://doi.org/10.1109/ISSoC.2012.6376370 ER -