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Link to original content: https://dblp.org/rec/conf/icce-berlin/KalaliH16.ris
Provider: Schloss Dagstuhl - Leibniz Center for Informatics Database: dblp computer science bibliography Content:text/plain; charset="utf-8" TY - CPAPER ID - DBLP:conf/icce-berlin/KalaliH16 AU - Kalali, Ercan AU - Hamzaoglu, Ilker TI - FPGA implementation of HEVC intra prediction using high-level synthesis. BT - IEEE 6th International Conference on Consumer Electronics - Berlin, ICCE-Berlin 2016, Berlin, Germany, September 5-7, 2016 SP - 163 EP - 166 PY - 2016// DO - 10.1109/ICCE-BERLIN.2016.7684745 UR - https://doi.org/10.1109/ICCE-Berlin.2016.7684745 ER -