Provider: Schloss Dagstuhl - Leibniz Center for Informatics
Database: dblp computer science bibliography
Content:text/plain; charset="utf-8"
TY - CPAPER
ID - DBLP:conf/hpca/SrikanthRHDCDCF18
AU - Srikanth, Sriseshan
AU - Rabbat, Paul G.
AU - Hein, Eric R.
AU - Deng, Bobin
AU - Conte, Thomas M.
AU - DeBenedictis, Erik
AU - Cook, Jeanine E.
AU - Frank, Michael P.
TI - Memory System Design for Ultra Low Power, Computationally Error Resilient Processor Microarchitectures.
BT - IEEE International Symposium on High Performance Computer Architecture, HPCA 2018, Vienna, Austria, February 24-28, 2018
SP - 696
EP - 709
PY - 2018//
DO - 10.1109/HPCA.2018.00065
UR - https://doi.org/10.1109/HPCA.2018.00065
UR - https://doi.ieeecomputersociety.org/10.1109/HPCA.2018.00065
ER -
