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Link to original content: https://dblp.org/rec/conf/hpca/SaileshwarNREQ18.ris
Provider: Schloss Dagstuhl - Leibniz Center for Informatics Database: dblp computer science bibliography Content:text/plain; charset="utf-8" TY - CPAPER ID - DBLP:conf/hpca/SaileshwarNREQ18 AU - Saileshwar, Gururaj AU - Nair, Prashant J. AU - Ramrakhyani, Prakash AU - Elsasser, Wendy AU - Qureshi, Moinuddin K. TI - SYNERGY: Rethinking Secure-Memory Design for Error-Correcting Memories. BT - IEEE International Symposium on High Performance Computer Architecture, HPCA 2018, Vienna, Austria, February 24-28, 2018 SP - 454 EP - 465 PY - 2018// DO - 10.1109/HPCA.2018.00046 UR - https://doi.org/10.1109/HPCA.2018.00046 UR - https://doi.ieeecomputersociety.org/10.1109/HPCA.2018.00046 ER -