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Link to original content: https://dblp.org/rec/conf/fpl/WheelerGNH01.xml
Timothy Wheeler Paul S. Graham Brent E. Nelson Brad L. Hutchings Using Design-Level Scan to Improve FPGA Design Observability and Controllability for Functional Verification. 483-492 2001 conf/fpl/2001 FPL https://doi.org/10.1007/3-540-44687-7_50 db/conf/fpl/fpl2001.html#WheelerGNH01