Provider: Schloss Dagstuhl - Leibniz Center for Informatics
Database: dblp computer science bibliography
Content:text/plain; charset="utf-8"
TY - CPAPER
ID - DBLP:conf/fpga/LuYYXLW17
AU - Lu, Tianyi
AU - Yin, Shouyi
AU - Yao, Xianqing
AU - Xie, Zhicong
AU - Liu, Leibo
AU - Wei, Shaojun
TI - Joint Modulo Scheduling and Memory Partitioning with Multi-Bank Memory for High-Level Synthesis (Abstract Only).
BT - Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, FPGA 2017, Monterey, CA, USA, February 22-24, 2017
SP - 290
PY - 2017//
UR - http://dl.acm.org/citation.cfm?id=3021778
ER -