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Link to original content: https://dblp.org/rec/conf/esscirc/YamaokaOK08.xml
Masanao Yamaoka Kenichi Osada Takayuki Kawahara A cell-activation-time controlled SRAM for low-voltage operation in DVFS SoCs using dynamic stability analysis. 286-289 2008 ESSCIRC https://doi.org/10.1109/ESSCIRC.2008.4681848 conf/esscirc/2008 db/conf/esscirc/esscirc2008.html#YamaokaOK08