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Link to original content: https://dblp.org/rec/conf/dtis/GhaniKH16.rdf
Firas Abdul Ghani et al.: FPGA implementations of HEVC sub-pixel interpolation using high-level synthesis. (2016) conf/dtis/GhaniKH16 10.1109/DTIS.2016.7483883 FPGA implementations of HEVC sub-pixel interpolation using high-level synthesis. 3 Firas Abdul Ghani 1 Ercan Kalali 2 Ilker Hamzaoglu 3 1-4 DTIS DTIS 2016 2016 provenance information for RDF data of dblp record 'conf/dtis/GhaniKH16' 2020-03-27T08:46:10+0100