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Link to original content: https://dblp.org/rec/conf/dsd/WilleFMALD08.nt
. . . . . "Robert Wille et al.: Identifying a Subset of System Verilog Assertions for Efficient Bounded Model Checking. (2008)" . . . _:ID_d7d1aeb8ad19928be98ce39797e977ca . _:ID_d7d1aeb8ad19928be98ce39797e977ca . _:ID_d7d1aeb8ad19928be98ce39797e977ca . _:ID_d7d1aeb8ad19928be98ce39797e977ca . _:ID_d7d1aeb8ad19928be98ce39797e977ca "conf/dsd/WilleFMALD08" . _:ID_ef6cc6fdc024f44eae79c0c78f53abb6 . _:ID_ef6cc6fdc024f44eae79c0c78f53abb6 . _:ID_ef6cc6fdc024f44eae79c0c78f53abb6 . _:ID_ef6cc6fdc024f44eae79c0c78f53abb6 . _:ID_ef6cc6fdc024f44eae79c0c78f53abb6 "10.1109/DSD.2008.53" . _:ID_166a4143a43ee292da200bd36f925788 . _:ID_166a4143a43ee292da200bd36f925788 . _:ID_166a4143a43ee292da200bd36f925788 . _:ID_166a4143a43ee292da200bd36f925788 "Q59242719" . "Identifying a Subset of System Verilog Assertions for Efficient Bounded Model Checking." . . . . . . . . . . . . . . "6"^^ . _:Sig_be5fa9ffde634047d01adedec9332586_1 . _:Sig_be5fa9ffde634047d01adedec9332586_1 . _:Sig_be5fa9ffde634047d01adedec9332586_1 . _:Sig_be5fa9ffde634047d01adedec9332586_1 "Robert Wille" . _:Sig_be5fa9ffde634047d01adedec9332586_1 . _:Sig_be5fa9ffde634047d01adedec9332586_1 . _:Sig_be5fa9ffde634047d01adedec9332586_1 "1"^^ . _:Sig_be5fa9ffde634047d01adedec9332586_1 . _:Sig_be5fa9ffde634047d01adedec9332586_2 . _:Sig_be5fa9ffde634047d01adedec9332586_2 . _:Sig_be5fa9ffde634047d01adedec9332586_2 . _:Sig_be5fa9ffde634047d01adedec9332586_2 "G\u00F6rschwin Fey" . _:Sig_be5fa9ffde634047d01adedec9332586_2 . _:Sig_be5fa9ffde634047d01adedec9332586_2 . _:Sig_be5fa9ffde634047d01adedec9332586_2 "2"^^ . _:Sig_be5fa9ffde634047d01adedec9332586_2 . _:Sig_be5fa9ffde634047d01adedec9332586_3 . _:Sig_be5fa9ffde634047d01adedec9332586_3 . _:Sig_be5fa9ffde634047d01adedec9332586_3 . _:Sig_be5fa9ffde634047d01adedec9332586_3 "Marc Messing" . _:Sig_be5fa9ffde634047d01adedec9332586_3 . _:Sig_be5fa9ffde634047d01adedec9332586_3 "3"^^ . _:Sig_be5fa9ffde634047d01adedec9332586_3 . _:Sig_be5fa9ffde634047d01adedec9332586_4 . _:Sig_be5fa9ffde634047d01adedec9332586_4 . _:Sig_be5fa9ffde634047d01adedec9332586_4 . _:Sig_be5fa9ffde634047d01adedec9332586_4 "Gerhard Angst" . _:Sig_be5fa9ffde634047d01adedec9332586_4 . _:Sig_be5fa9ffde634047d01adedec9332586_4 "4"^^ . _:Sig_be5fa9ffde634047d01adedec9332586_4 . _:Sig_be5fa9ffde634047d01adedec9332586_5 . _:Sig_be5fa9ffde634047d01adedec9332586_5 . _:Sig_be5fa9ffde634047d01adedec9332586_5 . _:Sig_be5fa9ffde634047d01adedec9332586_5 "Lothar Linhard" . _:Sig_be5fa9ffde634047d01adedec9332586_5 . _:Sig_be5fa9ffde634047d01adedec9332586_5 "5"^^ . _:Sig_be5fa9ffde634047d01adedec9332586_5 . _:Sig_be5fa9ffde634047d01adedec9332586_6 . _:Sig_be5fa9ffde634047d01adedec9332586_6 . _:Sig_be5fa9ffde634047d01adedec9332586_6 . _:Sig_be5fa9ffde634047d01adedec9332586_6 "Rolf Drechsler" . _:Sig_be5fa9ffde634047d01adedec9332586_6 . _:Sig_be5fa9ffde634047d01adedec9332586_6 . _:Sig_be5fa9ffde634047d01adedec9332586_6 "6"^^ . _:Sig_be5fa9ffde634047d01adedec9332586_6 . . . . . . "542-549" . "DSD" . "DSD" . "2008"^^ . "2008"^^ . . "provenance information for RDF data of dblp record 'conf/dsd/WilleFMALD08'" . . . . "2023-03-23T23:59:37+0100" .