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Link to original content: https://dblp.org/rec/conf/date/SehgalGMC06.rdf
Anuja Sehgal et al.: Hierarchy-aware and area-efficient test infrastructure design for core-based system chips. (2006) conf/date/SehgalGMC06 10.1109/DATE.2006.244140 Hierarchy-aware and area-efficient test infrastructure design for core-based system chips. 4 Anuja Sehgal 1 Sandeep Kumar Goel 2 Erik Jan Marinissen 3 Krishnendu Chakrabarty 4 285-290 DATE DATE 2006 2006 provenance information for RDF data of dblp record 'conf/date/SehgalGMC06' 2023-03-24T00:02:46+0100