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Link to original content: https://dblp.org/rec/conf/cosade/BarenghiBFPZ20.rdf
Alessandro Barenghi et al.: Integrating Side Channel Security in the FPGA Hardware Design Flow. (2020) conf/cosade/BarenghiBFPZ20 10.1007/978-3-030-68773-1_13 Integrating Side Channel Security in the FPGA Hardware Design Flow. 5 Alessandro Barenghi 1 Matteo Brevi 2 William Fornaciari 3 Gerardo Pelosi 4 Davide Zoni 5 275-290 COSADE COSADE 2020 2021 provenance information for RDF data of dblp record 'conf/cosade/BarenghiBFPZ20' 2021-02-11T11:55:02+0100