dblp: Geoff Knagge
https://dblp.org/pid/96/215.html
dblp person page RSS feedThu, 25 Apr 2024 05:52:57 +0200en-USdaily1released under the CC0 1.0 licensedblp@dagstuhl.de (dblp team)dblp@dagstuhl.de (dblp team)Computers/Computer_Science/Publications/Bibliographieshttp://www.rssboard.org/rss-specificationhttps://dblp.org/img/logo.144x51.pngdblp: Geoff Knaggehttps://dblp.org/pid/96/215.html14451Fast Linear Model Predictive Control Via Custom Integrated Circuit Architecture.https://doi.org/10.1109/TCST.2010.2096224Adrian G. Wills, Geoff Knagge, Brett Ninness: Fast Linear Model Predictive Control Via Custom Integrated Circuit Architecture.IEEE Trans. Control. Syst. Technol.20(1): 59-71 (2012)]]>https://dblp.org/rec/journals/tcst/WillsKN12Sun, 01 Jan 2012 00:00:00 +0100A VLSI 8 × 8 MIMO Near-ML Detector with Preprocessing.https://doi.org/10.1007/s11265-008-0222-6Geoff Knagge, Mark Bickerstaff, Brett Ninness, Steven R. Weller, Graeme Woodward: A VLSI 8 × 8 MIMO Near-ML Detector with Preprocessing.J. Signal Process. Syst.56(2-3): 229-247 (2009)]]>https://dblp.org/rec/journals/vlsisp/KnaggeBNWW09Thu, 01 Jan 2009 00:00:00 +0100ASIC and FPGA implementation strategies for Model Predictive Control.https://doi.org/10.23919/ECC.2009.7074394Geoff Knagge, Adrian Wills, Adam Mills, Brett Ninness: ASIC and FPGA implementation strategies for Model Predictive Control.ECC2009: 144-149]]>https://dblp.org/rec/conf/eucc/KnaggeWMN09Thu, 01 Jan 2009 00:00:00 +0100A VLSI 8×8 MIMO Near-ML Decoder Engine.https://doi.org/10.1109/SIPS.2006.352614Geoff Knagge, Mark Bickerstaff, Brett Ninness, Steven R. Weller, Graeme Woodward: A VLSI 8×8 MIMO Near-ML Decoder Engine.SiPS2006: 387-392]]>https://dblp.org/rec/conf/sips/KnaggeBNWW06Sun, 01 Jan 2006 00:00:00 +0100Silicon complexity for maximum likelihood MIMO detection using spherical decoding.https://doi.org/10.1109/JSSC.2004.831454David Garrett, Linda M. Davis, Stephan ten Brink, Bertrand M. Hochwald, Geoff Knagge: Silicon complexity for maximum likelihood MIMO detection using spherical decoding.IEEE J. Solid State Circuits39(9): 1544-1552 (2004)]]>https://dblp.org/rec/journals/jssc/GarrettDBHK04Thu, 01 Jan 2004 00:00:00 +0100An optimised parallel tree search for multiuser detection with VLSI implementation strategy.https://doi.org/10.1109/GLOCOM.2004.1378445Geoff Knagge, Graeme Woodward, Steven R. Weller, Brett Ninness: An optimised parallel tree search for multiuser detection with VLSI implementation strategy.GLOBECOM2004: 2440-2444]]>https://dblp.org/rec/conf/globecom/KnaggeWWN04Thu, 01 Jan 2004 00:00:00 +0100A highly-parallel VLSI architecture for a list sphere detector.https://doi.org/10.1109/ICC.2004.1313025Benjamin Widdup, Graeme Woodward, Geoff Knagge: A highly-parallel VLSI architecture for a list sphere detector.ICC2004: 2720-2725]]>https://dblp.org/rec/conf/icc/WiddupWK04Thu, 01 Jan 2004 00:00:00 +0100Matrix datapath architecture for an iterative 4x4 MIMO noise whitening algorithm.https://doi.org/10.1145/764808.764848Geoff Knagge, David Garrett, Sivarama Venkatesan, Chris Nicol: Matrix datapath architecture for an iterative 4x4 MIMO noise whitening algorithm.ACM Great Lakes Symposium on VLSI2003: 153-156]]>https://dblp.org/rec/conf/glvlsi/KnaggeGVN03Wed, 01 Jan 2003 00:00:00 +0100