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2000 – 2009
- 2009
[j3]Hushrav Mogal, Haifeng Qian
, Sachin S. Sapatnekar, Kia Bazargan:
Fast and Accurate Statistical Criticality Computation Under Process Variations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(3): 350-363 (2009)- 2008
- [c5]Hushrav Mogal, Kia Bazargan:
Thermal-aware floorplanning for task migration enabled active sub-threshold leakage reduction. ICCAD 2008: 302-305 - 2007
- [c4]Hushrav Mogal, Kia Bazargan:
Microarchitecture floorplanning for sub-threshold leakage reduction. DATE 2007: 1238-1243 - [c3]Hushrav Mogal, Haifeng Qian, Sachin S. Sapatnekar, Kia Bazargan:
Clustering based pruning for statistical criticality computation under process variations. ICCAD 2007: 340-343 - 2006
- [j2]Cristinel Ababei, Hushrav Mogal, Kia Bazargan:
Three-dimensional place and route for FPGAs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(6): 1132-1140 (2006) - 2005
- [j1]Cristinel Ababei, Yan Feng, Brent Goplen, Hushrav Mogal, Tianpei Zhang, Kia Bazargan, Sachin S. Sapatnekar:
Placement and Routing in 3D Integrated Circuits. IEEE Des. Test Comput. 22(6): 520-531 (2005) - [c2]Cristinel Ababei, Hushrav Mogal, Kia Bazargan:
Three-dimensional place and route for FPGAs. ASP-DAC 2005: 773-778 - [c1]Cristinel Ababei, Hushrav Mogal, Kia Bazargan:
3D FPGAs: placement, routing, and architecture evaluation (abstract only). FPGA 2005: 263
Coauthor Index
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